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Part Number HT46R12

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HT46R12
A/D Type 8-Bit OTP MCU
Rev. 1.00
1
November 1, 2005
General Description
The device are 8-bit, high performance, RISC architec-
ture microcontroller devices specifically designed for
A/D applications that interface directly to analog signals,
such as those from sensors.
The advantages of low power consumption, I/O flexibil-
ity, programmable frequency divider, timer functions,
oscillator options, multi-channel A/D Converter, HALT
and wake-up functions, enhance the versatility of these
devices to suit a wide range of A/D application possibili-
ties such as sensor signal processing.
The device also provides two comparators and a pro-
grammable pulse generator (PPG), hence, it is particu-
larly suitable for use in products such as induction
cooker and home appliances.
Features
·
Operating voltage:
f
SYS
=4MHz: 2.2V~5.5V
f
SYS
=8MHz: 3.3V~5.5V
·
16 bidirectional I/O lines
·
Two 8-bit programmable timer/event counter with
overflow interrupt and 7-stage prescaler
·
One 8-bit programmable pulse generators (PPG)
output channel, with prescaler and 8-bit program-
mable timer counter, and supports active low or
active high output
·
On-chip crystal and RC oscillator
·
Watchdog Timer
·
2048
´14 program memory
·
88
´8 data memory RAM
·
Supports PFD for sound generation
·
HALT function and wake-up feature reduce power
consumption
·
Up to 0.5
ms instruction cycle with 8MHz system
clock at V
DD
=5V
·
8-level subroutine nesting
·
4 channels 9-bit resolution A/D converter
·
Two comparators with interrupt function
·
Bit manipulation instruction
·
14-bit table read instruction
·
63 powerful instructions
·
All instructions in one or two machine cycles
·
Low voltage reset function
·
24-pin SKDIP/SOP package
Technical Document
·
Tools Information
·
FAQs
·
Application Note
-
HA0004E HT48 & HT46 MCU UART Software Implementation Method
-
HA0005E Controlling the I2C bus with the HT48 & HT46 MCU Series
-
HA0011E HT48 & HT46 Keyboard Scan Program
-
HA0013E HT48 & HT46 LCM Interface Design
-
HA0101E Using the HT46R12 in an Induction Cooker
Block Diagram
Pin Assignment
HT46R12
Rev. 1.00
2
November 1, 2005
O S C 2
O S C 1
R E S
V D D
M U X
P A C
P A
P o r t A
P o r t B
V S S
P r o g r a m
R O M
P r o g r a m
C o u n t e r
I n t e r r u p t
C i r c u i t
S t a c k
I N T C
D a t a
M e m o r y
I n s t r u c t i o n
R e g i s t e r
M
U
X
I n s t r u c t i o n
D e c o d e r
S T A T U S
A L U
S h i f t e r
A C C
M P
L V R
M
U
X
M
U
X
W D T O S C
W D T
M
U
X
P F D 0
P F D 1
f
S Y S
/ 4
f
S Y S
P r e s c a l e r
T M R 0
f
S Y S
/ 4
T M R 1
T M R 0 C
T M R 0
T M R 1 C
T M R 1
P P G
f
S Y S
P r e s c a l e r
P P G 0 C
P P G T 0
P C 0 / C 0 V I N -
P C 1 / C 0 V I N +
P C 2 / C 0 O U T
P C 3 / C 1 O U T
P o r t C
P C C
P C
4 - C h a n n e l
A / D C o n v e r t e r
P B C
P B
P A 0 ~ P A 2
P A 3 / P F D
P A 4 / T M R 0
P A 5 , P A 6
P A 7 / T M R 1
P B 0 / A N 0 ~ P B 3 / A N 3
P P G 0 C
P P G
P P G
H A L T
E N / D I S
T i m i n g
G e n e r a t o r
H T 4 6 R 1 2
2 4 S K D I P - A / S O P - A
P B 1 / A N 1
P B 0 / A N 0
P A 3 / P F D
P A 2
P A 1
P A 0
C 1 V I N +
C 1 V I N -
P C 3 / C 1 O U T
P C 2 / C 0 O U T
V S S
P C 1 / C 0 V I N +
P B 2 / A N 2
P B 3 / A N 3
P A 4 / T M R 0
P A 5
P A 6
P A 7 / T M R 1
O S C 2
O S C 1
V D D
R E S
P P G
P C 0 / C 0 V I N -
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
Pin Description
Pin Name
I/O
Options
Description
PA0~PA2
PA3/PFD
PA4/TMR0
PA5, PA6
PA7/TMR1
I/O
Pull-high
Wake-up
PA3 or PFD
Bidirectional 8-bit input/output port. Each bit can be configured as wake-up in-
put by options. Software instructions determine the CMOS output or Schmitt
trigger input with or without pull-high resistor (determined by pull-high options: bit
option). The PA3, PA4 and PA7 are pin-shared with PFD, TMR0 and TMR1 re-
spectively.
PB0/AN0
PB1/AN1
PB2/AN2
PB3/AN3
I/O
Pull-high
Bidirectional 4-bit input/output port. Software instructions determine the
CMOS output, Schmitt trigger input with or without pull-high resistor (deter-
mined by pull-high option: bit option) or A/D input.
Once a PB line is selected as an A/D input (by using software control), the I/O
function and pull-high resistor are disabled automatically.
PC0/C0VIN-
PC1/C0VIN+
PC2/C0OUT
PC3/C1OUT
C1VIN-
C1VIN+
I/O
Pull-high
I/O or
Comparator
Bidirectional 4-bit input/output port. Software instructions determine the
CMOS output, Schmitt trigger input with or without pull-high resistor (deter-
mine by pull-high option: port option).
PC0, PC1 and PC2 are pin-shared with C0VIN-, C0VIN+ and C0OUT respec-
tively. Once the Comparator 0 function is used, the internal registers related to
PC0, PC1 and PC2 cannot be used, and the I/O function and pull-high resistor
are disabled automatically. Software instructions determine the Comparator 0
function to be used.
C1VIN+ and C1VIN- are Comparator 1 input, C1OUT is pin-shared with PC3.
Once the Comparator 1 function is used, the internal registers related to PC3
cannot be used, and the I/O function and pull-high resistor are disabled auto-
matically. Software instructions determine the Comparator 1 function to be
used.
PPG
O
¾
Programmable pulse generator output pin, the pin is floating when the power is
first turned on. The PPG0 output level (active low or active high) can be se-
lected via configuration option.
OSC1
OSC2
I
O
Crystal
or RC
OSC1, OSC2 are connected to an RC network or a Crystal (determined by op-
tions) for the internal system clock. In the case of RC operation, OSC2 is the
output terminal for 1/4 system clock.
RES
I
¾
Schmitt trigger reset input. Active low.
VDD
¾
¾
Positive power supply
VSS
¾
¾
Negative power supply, ground.
Absolute Maximum Ratings
Supply Voltage ...........................V
SS
-0.3V to V
SS
+6.0V
Storage Temperature ............................
-50°C to 125°C
Input Voltage..............................V
SS
-0.3V to V
DD
+0.3V
Operating Temperature...........................
-40°C to 85°C
Note: These are stress ratings only. Stresses exceeding the range specified under
²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
HT46R12
Rev. 1.00
3
November 1, 2005
D.C. Characteristics
Ta=25
°C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
DD
Operating Voltage
¾ f
SYS
=4MHz
2.2
¾
5.5
V
¾ f
SYS
=8MHz
3.3
¾
5.5
V
I
DD1
Operating Current
(Crystal OSC)
3V
No load, f
SYS
=4MHz
ADC disable
¾
0.6
1.5
mA
5V
¾
2
4
mA
I
DD2
Operating Current
(RC OSC)
3V
No load, f
SYS
=4MHz
ADC disable
¾
0.8
1.5
mA
5V
¾
2.5
4
mA
I
DD3
Operating Current
(Crystal OSC, RC OSC)
5V
No load, f
SYS
=8MHz
ADC disable
¾
4
8
mA
I
STB1
Standby Current
(WDT Enabled)
3V
No load, system HALT
¾
¾
5
mA
5V
¾
¾
10
mA
I
STB2
Standby Current
(WDT Disabled)
3V
No load, system HALT
¾
¾
1
mA
5V
¾
¾
2
mA
V
IL1
Input Low Voltage for I/O Ports,
TMR0 and TMR1
¾
¾
0
¾
0.3V
DD
V
V
IH1
Input High Voltage for I/O Ports,
TMR0 and TMR1
¾
¾
0.7V
DD
¾
V
DD
V
V
IL2
Input Low Voltage (RES)
¾
¾
0
¾
0.4V
DD
V
V
IH2
Input High Voltage (RES)
¾
¾
0.9V
DD
¾
V
DD
V
V
LVR
Low Voltage Reset
¾
¾
2.7
3
3.3
V
I
OL
I/O Port Sink Current
3V
V
OL
=0.1V
DD
4
8
¾
mA
5V
V
OL
=0.1V
DD
10
20
¾
mA
I
OH
I/O Port Source Current
3V
V
OH
=0.9V
DD
-2
-4
¾
mA
5V
V
OH
=0.9V
DD
-5
-10
¾
mA
R
PH
Pull-high Resistance
3V
¾
20
60
100
k
W
5V
¾
10
30
50
k
W
V
AD
A/D Input Voltage
¾
¾
0
¾
V
DD
V
E
AD
A/D Conversion Error
¾
¾
¾
±0.5
±1
LSB
I
ADC
Additional Power Consumption
if A/D Converter is Used
3V
¾
¾
0.5
1
mA
5V
¾
1.5
3
mA
V
OS
Comparator Input Offset Voltage
¾
¾
-10
¾
10
mV
V
I
Comparator Input Voltage Range
¾
¾
0.2
¾
V
DD
-0.8
V
HT46R12
Rev. 1.00
4
November 1, 2005
A.C. Characteristics
Ta=25
°C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
f
SYS
System Clock
¾ 2.2V~5.5V
400
¾
4000
kHz
¾ 3.3V~5.5V
400
¾
8000
kHz
f
TIMER
Timer I/P Frequency
(TMR0/TMR1)
¾ 2.2V~5.5V
0
¾
4000
kHz
¾ 3.3V~5.5V
0
¾
8000
kHz
t
WDTOSC
Watchdog Oscillator Period
3V
¾
45
90
180
ms
5V
¾
32
65
130
ms
t
RES
External Reset Low Pulse Width
¾
¾
1
¾
¾
ms
t
SST
System Start-up Timer Period
¾
Power-up or Wake-up
from HALT
¾
1024
¾
*t
SYS
t
INT
Interrupt Pulse Width
¾
¾
1
¾
¾
ms
t
AD
A/D Clock Period
¾
¾
1
¾
¾
ms
t
ADC
A/D Conversion Time
¾
¾
¾
76
¾
t
AD
t
ADCS
A/D Sampling Time
¾
¾
¾
32
¾
t
AD
t
COMP
Comparator Response Time
¾
¾
¾
¾
3
ms
Note: *t
SYS
=1/f
SYS
HT46R12
Rev. 1.00
5
November 1, 2005