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Part Number HD74ALVCH162827

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HD74ALVCH162827
20-bit Buffers / Drivers with 3-state Outputs
ADE-205-188B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH162827 is composed of two 10-bit sections with separate output enable signals. For
either 10-bit buffer section, the two output enable (1
OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both
be low for the corresponding Y outputs to be active. If either output enable input is high, the outputs of that
10-bit buffer section are in the high impedance state. Active bus hold circuitry is provided to hold unused
or floating data inputs at a valid logic level. All outputs, which are designed to sink up to 12 mA, include
26
resistors to reduce overshoot and undershoot.
Features
·
V
CC
= 2.3 V to 3.6 V
·
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25
°
C)
·
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25
°
C)
·
High output current
±
12 mA (@V
CC
= 3.0 V)
·
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
·
All outputs have equivalent 26
series resistors, so no external resistors are required.
HD74ALVCH162827
2
Function Table
Inputs
Output Y
OE1
OE2
A
L
L
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z
H : High level
L : Low level
X : Immaterial
Z : High impedance
HD74ALVCH162827
3
Pin Arrangement
(Top view)
1
2
3
4
5
6
7
8
9
10
V
CC
V
CC
1Y1
1Y2
GND
1Y3
1Y4
1Y5
1Y6
1Y7
GND
1Y8
1Y9
1Y10
2Y1
2Y2
2Y3
GND
2Y4
2Y5
2Y6
2Y7
2Y8
1
OE1
11
12
13
14
15
16
17
18
19
20
21
22
23
24
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
2A8
GND 25
32 GND
2Y9 26
31 2A9
2Y10 27
30 2A10
2
OE1
28
29 2
OE2
2A7
2A6
2A5
2A4
2A3
GND
2A2
2A1
1A10
1A9
1A8
GND
1A7
1A6
1A5
1A4
1A3
1A2
1
OE2
GND
1A1
V
CC
V
CC
HD74ALVCH162827
4
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage
V
CC
­0.5 to 4.6
V
Input voltage
*1
V
I
­0.5 to 4.6
V
Output voltage
*1, 2
V
O
­0.5 to V
CC
+0.5
V
Input clamp current
I
IK
­50
mA
V
I
< 0
Output clamp current
I
OK
±
50
mA
V
O
< 0 or V
O
> V
CC
Continuous output current
I
O
±
50
mA
V
O
= 0 to V
CC
V
CC
, GND current / pin
I
CC
or I
GND
±
100
mA
Maximum power dissipation
at Ta = 55
°
C (in still air)
*3
P
T
1
W
TSSOP
Storage temperature
Tstg
­65 to 150
°
C
Notes:
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150
°
C
and a board trace length of 750 mils.
Recommended Operating Conditions
Item
Symbol
Min
Max
Unit
Conditions
Supply voltage
V
CC
2.3
3.6
V
Input voltage
V
I
0
V
CC
V
Output voltage
V
O
0
V
CC
V
High level output current
I
OH
--
­6
mA
V
CC
= 2.3 V
--
­8
V
CC
= 2.7 V
--
­12
V
CC
= 3.0 V
Low level output current
I
OL
--
6
mA
V
CC
= 2.3 V
--
8
V
CC
= 2.7 V
--
12
V
CC
= 3.0 V
Input transition rise or fall rate
t /
v
0
10
ns / V
Operating temperature
Ta
­40
85
°
C
Note:
Unused control inputs must be held high or low to prevent them from floating.
HD74ALVCH162827
5
Logic Diagram
1
OE1
1
OE2
1A1
1Y1
To nine other channels
55
2
56
1
2
OE1
2
OE2
2A1
2Y1
To nine other channels
42
15
29
28