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Part Number HD155121F

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HD155121F
RF Transceiver IC for GSM and PCN Dual band cellular systems
ADE-207-265A (Z)
2nd Edition
May 1999
Description
The HD155121F is a RF transceiver IC for GSM and PCN dual band cellular systems, and integrates most
of the low power silicon functions of a transceiver. The HD155121F incorporates two bias circuits for RF
LNAs, two first mixers, a second mixer, a programmable gain amplifier, and an IQ demodulator for the
receiver, and an IQ modulator and offset PLL for the transmitter. Also, on chip are dividers for the phase
splitter. Moreover the HD155121F includes control circuits to implement power saving modes. These
functions can operate down to 2.7 V and are housed in a 48-pin LQFP SMD package.
Hence the HD155121F can form a small size transceiver handset for dual band by adding a dual PLL
frequency synthesizer IC, power amplifiers and some external components.
The HD155121F is fabricated using a 0.6
µ
m double-polysilicon Bi-CMOS process.
Functions
Receiver(Rx)
·
Low Noise Amplifier (LNA) bias circuit
·
First mixer
·
IF amplifier and second mixer
·
Programmable Gain Amplifier (PGA)
·
IQ demodulator with 90 degree phase splitter
Transmitter(Tx)
·
IQ modulator with 90 degree phase splitter
·
Offset PLL
Down converter
Phase comparator
TXVCO driver
Others
·
IF dividers
·
Power saving control circuit
·
IFVCO
HD155121F
2
Features
·
Highly integrated RF processing for hand-portables
·
Operating supply voltage
V
CC
: 2.7 to 3.6 V
Phase comparator and TXVCO driver circuit : 2.7 to 5.25 V
·
Current consumption
Rx mode (GSM) : 53 mA + LNA current
Rx mode (PCN) : 52 mA + LNA current
Tx mode (GSM) : 36 mA
Tx mode (PCN) : 37 mA
Idle mode :1
µ
A
·
Operating temperature : ­20 to +75 degree
·
LQFP 48pin SMD (Low Profile Quad Flat Package)
·
Wide operating frequencies
Rx
RF
GSM : 925 - 960 MHz
PCN : 1805 - 1880 MHz
1st IF
: 225 MHz
2nd IF
: 45 MHz
Tx
RF
GSM : 880 - 915 MHz
PCN : 1710 - 1785 MHz
IF
GSM : 270 MHz
PCN : 135 MHz
·
Offset PLL architecture for Transmitter
·
High dynamic range Programmable Gain Amplifier (PGA)
HD155121F
3
Pin Arrangement
1
2
3
4
5
6
7
8
9
10
11
12
MIX1INB1
MIX1IN1
RFOUT
RFIN1
RFIN2
VCCPLL
GNDPLL
VCOIN2
VCOIN1
VCCCOMP
PLLOUT
ICURAD
36
37
38
39
40
41
42
43
44
45
46
47
48
(Top View)
14
13
24
23
22
21
20
19
18
17
16
15
35
34
33
32
31
30
29
28
27
26
25
IFLO
BAND
IFVCOO
IFVCOI
VCCIF
GNDIF
IFIN
IFINB
LE
SDATA
CLK
MIX2O
QINB
QIN
IINB
IIN
MODLB
VCCIQ
GNDIQ
QOUTB
QOUT
IOUTB
IOUT
MIX2OB
MIX1IN2
MIX1INB2
POONTX
POONRX2
POONRX1
MIX1OUTB
MIX1OUT
VCCMIX1
GNDMIX1
RFLOIN
VCCDIV
GNDDIV
HD155121F
4
Pin Description
Pin No.
Pin Name
Description
1
MIX1INB1
Negative input for Mixer1 (GSM)
2
MIX1IN1
Positive input for Mixer1 (GSM)
3
RFOUT
Bias for the collector of LNA transistor
4
RFIN1
Bias for the base of LNA transistor (GSM)
5
RFIN2
Bias for the base of LNA transistor (PCN)
6
VCCPLL
V
CC
for OPLL
7
GNDPLL
GND for OPLL
8
VCOIN2
TxVCO signal input (PCN)
9
VCOIN1
TxVCO signal input (GSM)
10
VCCCOMP
V
CC
for phase comparator
11
PLLOUT
Current output to control and modulate the TxVCO
12
ICURAD
Phase comparator output current setting
13
QINB
Negative input of Q signal for modulator
14
QIN
Positive input of Q signal for modulator
15
IINB
Negative input of I signal for modulator
16
IIN
Positive input of I signal for modulator
17
MODLB
V
CC
for modulator load bias
18
VCCIQ
V
CC
for IQ modulator and demodulator
19
GNDIQ
GND for IQ modulator and demodulator
20
QOUTB
Negative output of Q signal for modulator
21
QOUT
Positive output of Q signal for modulator
22
IOUTB
Negative output of I signal for modulator
23
IOUT
Positive output of I signal for modulator
24
MIX2OB
Negative output for Mixer2
25
MIX2O
Positive output for Mixer2
26
CLK
Clock for serial data
27
SDATA
Serial data for Gain control
28
LE
Load enable for serial data
29
IFINB
Negative input for Mixer2
30
IFIN
Positive input for Mixer2
31
GNDIF
GND for Mixer2 and PGA
32
VCCIF
V
CC
for Mixer2 and PGA
33
IFVCOI
Base of IFVCO transistor
34
IFVCOO
Emitter of IFVCO transistor
HD155121F
5
Pin Description (cont)
Pin No.
Pin Name
Description
35
BAND
Band control (Low: GSM, High: PCN)
36
IFLO
Output of IFVCO or Input of IF Local
37
GNDDIV
GND for Divider and IFVCO
38
VCCDIV
V
CC
for Divider and IFVCO
39
RFLOIN
Input for RF Local
40
GNDMIX1
GND for Mixer1
41
VCCMIX1
V
CC
for Mixer1
42
MIX1OUT
Positive output for Mixer1 (GSM/PCN)
43
MIX1OUTB
Negative output for Mixer1 (GSM/PCN)
44
POONRX1
Power save control for LNA and Mixer1
45
POONRX2
Power save control for Mixer2, PGA and demodulator
46
POONTX
Power save control for modulator and OPLL
47
MIX1INB2
Negative input for Mixer1 (PCN)
48
MIX1IN2
Positive input for Mixer1 (PCN)