DS04-28826-5E

FUJITSU SEMICONDUCTOR

DATA SHEET

ASSP

For Screen Display Control

CMOS

On-screen Display Controller

MB90096

DESCRIPTION

The MB90096 is a multi-scan on-screen display controller that supports horizontal sync signal frequencies of 15
kHz to 120 kHz.The on-screen display configuration is up to 32 characters x 16 lines. The character configuration
is up to 24 dots x 32 dots for high resolution, ideal for wide-screen TV, HDTV, and high-resolution personal computer
displays.

The character display functions include sprite character, character background display, and graphics functions,
contributing to the use of colorful GUI displays.

The MB90096 contains display memory (VRAM), character font ROM, and VCO, allowing characters to be dis-
played with a minimum of external components. This device also includes command table ROM for storage of
display command data, greatly reducing the load on the microcontroller.

PACKAGES

28-pin plastic SH-DIP

(DIP-28P-M03)

28-pin plastic SOP

(FPT-28P-M17)

MB90096

FEATURES

· Screen display capacity: Up to 32 characters x 16 lines (512 characters)
· Character configuration:

L size:

24 dots (horizontal) x 2h * dots (vertical)

M size:

18 dots (horizontal) x 2h * dots (vertical)

S size:

12 dots (horizontal) x 2h * dots (vertical)
*: h = 9 to 16

L, M, S sizes can be selected by individual character

Graphics characters can be displayed in L or S size only

Two h values can be set per screen, and either of the two can be selected for each line on the screen.

· Font types: 512 different fonts included (user selectable over entire screen)
· Display modes:

Normal characters/graphic characters:

(set for each character)

Trimmed display (horizontal trimming/pattern back ground): (set for each screen)
Character background (fill/shaded background):

(set for each character)

Line background (fill/shaded back ground):

(set for each line)

Enlarged (normal, double width, double height, double width x double height): (set for each line)
Blinking: Blinking characters:

(set for each character)

Blink period, duty ratio:

(set for each screen)

· Sprite character display (graphics display only):

Capable of displaying one block of characters (maximum 2 x 2 characters) on main screen.
(Can move horizontally and vertically in 2-dot increments.)
Setting applies to the first 256 characters only (character codes 000 to 0FFH).

· Background character display (graphics display only):

Capable of displaying a repeated pattern (2 x 2 characters) on main screen.
Setting applies to the first 256 characters only (character codes 000 to 0FFH).

· Display colors:

Character/background colors:

16 colors each (set for each character)

Line background/fill colors:

16 characters each (set for each line)

Screen background colors:

16 colors (set for each screen)

Graphics character dot colors: 16 colors (set for each dot)
Shading background frame colors (highlight/shadow):

16 colors each (set for each screen)

· Display position control:

Horizontal display start position:Set in 4-dot units (for each screen)
Vertical display start position:

Set in 4-dot units (for each screen)

Line spacing control:

Set in 2-dot units (for each line)

· Character/color signal output:

ROUT, GOUT, BOUT, IOUT (color signals)
VOB1 (OSD display period output signal)
VOB2 (semi-transparent color period output signal)

· Command transfer function (macro service):

Command table ROM, 16Kbyte included

· Compatible horizontal sync signal frequencies:

15 kHz to 120 kHz (PLL circuit included)

· Microcontroller interface:

16-bit serial input (3 signal input pins)

· Packages:

SH-DIP-28, SOP-28

· Power supply voltage: +5 V

MB90096

PIN DESCRIPTIONS

(Continued)

Pin

no.

Pin name

I/O

Circuit

type

Function

CPOUT

Horizontal sync phase comparison result signal output pin.
Connects to external low-pass filter.

VCOIN

Internal VCO voltage input pin.
Receives voltage signal input from external low-pass filter

DOCKI

Dot clock input pin.
Used only when operating on an externally generated dot clock signal. *

When unused, the horizontal sync signal *

should be input at this pin.

Internal pull-up resistance included.

DOCKO

Output pin for the dot clock signal generated by the internal VCO.
This signal can be fixed at "H" level by a command.

Output pin for the horizontal sync signal generated by the PLL circuit.

EVEN

Field control signal input pin.
This pin is disabled when noninterlaced display or internally generated
field control signals are selected by command.
Internal pull-up resistance included.

HSYNC

Horizontal sync signal input pin.
The period of this signal is used to generate the dot clock signal. The
active level is programmable.
Internal pull-up resistance included.

VSYNC

Vertical sync signal input pin.
The active level is programmable.
Internal pull-up resistance included.

DISP

Display output (ROUT, GOUT, BOUT, IOUT, VOB1, VOB2) control pin.
When this pin is set to "L" level, the display control is forcibly set to
inactive. Normally, the horizontal and vertical blanking signals are input
here. *

Internal pull-up resistance included.

17
18
19
20

IOUT (C3)

GOUT (C2)
ROUT (C1)

BOUT (C0)

Color signal output pins.
The active level is programmable.

VOB1

Display period output pin.
The active level is programmable.

VOB2

Semi-transparent period output signal.
The active level is programmable.

SCLK

Serial transfer shift clock input pin.
Internal pull-up resistance included.

SIN

Serial data input pin.
Internal pull-up resistance included.

Chip select pin.
Set to "L" level for serial transfer.
Internal pull-up resistance included.

MB90096

(Continued)

*1: The clock signal should be input even during a reset interval.

*2: The active level of the horizontal sync signal input may be either "H" or "L" level. During reset intervals, including

power-on resets, apply a "L" level fixed signal or a horizontal sync signal with one or more "L" level intervals at
the DOCKI pin.

*3: The MB90096 display signals (IOUT, ROUT, GOUT, BOUT, VOB1, VOB2) may be output during horizontal or

vertical blanking intervals. Normally devices such as TV or monitors use a reverence color setting during hori-
zontal and vertical blanking intervals, so that during this period the MB90096 display signals must be masked
at the DISP pin signal.

*4: When power is switched on, apply a "L" level signal for 1ms or longer after the V

(AV

) is stabilized.

Pin

no.

Pin name

I/O

Circuit

type

Function

TRE

Output pin for indicator that command transfer and fill operations are in
progress. Active "H" level output.

RESET

Reset input pin.
Input a "L" level signal *

at power-on. Internal pull-up resistance included.

TEST

Test signal input pin.
Input "H" level (fixed) for normal operation.
Internal pull-up resistance included.

+5 V power supply pin.

V3V

Connect 0.1

F capacitance between this pin and V

Ground pin.

+5 V power supply pin for VCO.

AV3V

Connect 0.1

F capacitance between this pin and AV

2, 4

Ground pin for VCO.

Part Number MB90096

Document Outline