September 1983
Revised February 1999
MM74HC138 3-t
o
-8 Li
ne
Decod
er
© 1999 Fairchild Semiconductor Corporation
DS005120.prf
www.fairchildsemi.com
MM74HC138
3-to-8 Line Decoder
General Description
The MM74HC138 decoder utilizes advanced silicon-gate
CMOS technology and is well suited to memory address
decoding or data routing applications. The circuit features
high noise immunity and low power consumption usually
associated with CMOS circuitry, yet has speeds compara-
ble to low power Schottky TTL logic.
The MM74HC138 has 3 binary select inputs (A, B, and C).
If the device is enabled, these inputs determine which one
of the eight normally HIGH outputs will go LOW. Two active
LOW and one active HIGH enables (G1, G2A and G2B)
are provided to ease the cascading of decoders.
The decoder's outputs can drive 10 low power Schottky
TTL equivalent loads, and are functionally and pin equiva-
lent to the 74LS138. All inputs are protected from damage
due to static discharge by diodes to V
CC
and ground.
Features
s
Typical propagation delay: 20 ns
s
Wide power supply range: 2V6V
s
Low quiescent current: 80
µ
A maximum (74HC Series)
s
Low input current: 1
µ
A maximum
s
Fanout of 10 LS-TTL loads
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignment for DIP, SOIC, SOP and TSSOP
Order Number
Package Number
Package Description
MM74HC138M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC138SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC138MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC138N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
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2
MM
74HC138
Truth Table
H
=
HIGH Level, L
=
LOW Level, X
=
don't care
Note 1: G2
=
G2A
+
G2B
Logic Diagram
Inputs
Outputs
Enable
Select
G1
G2 (Note 1)
C
B
A
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
H
X
X
X
H
H
H
H
H
H
H
H
L
X
X
X
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
H
H
H
H
H
L
H
H
H
H
H
L
H
L
L
H
H
H
H
L
H
H
H
H
L
H
L
H
H
H
H
H
H
L
H
H
H
L
H
H
L
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
H
H
H
H
L
3
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MM74HC138
Absolute Maximum Ratings
(Note 2)
(Note 3)
Recommended Operating
Conditions
Note 2: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 3: Unless otherwise specified all voltages are referenced to ground.
Note 4: Power Dissipation temperature derating -- plastic "N" package:
-
12 mW/
°
C from 65
°
C to 85
°
C.
DC Electrical Characteristics
(Note 5)
Note 5: For a power supply of 5V
±
10% the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage cur-
rent (I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
Supply Voltage (V
CC
)
-
0.5 to
+
7.0V
DC Input Voltage (V
IN
)
-
1.5 to V
CC
+
1.5V
DC Output Voltage (V
OUT
)
-
0.5 to V
CC
+
0.5V
Clamp Diode Current (I
IK
, I
OK
)
±
20 mA
DC Output Current, per pin (I
OUT
)
±
25 mA
DC V
CC
or GND Current, per pin
(I
CC
)
±
50 mA
Storage Temperature Range (T
STG
)
-
65
°
C to
+
150
°
C
Power Dissipation (P
D
)
(Note 4)
600 mW
S.O. Package only
500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
°
C
Min
Max
Units
Supply Voltage (V
CC
)
2
6
V
DC Input or Output Voltage
0
V
CC
V
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
-
40
+
85
°
C
Input Rise or Fall Times
(t
r
, t
f
) V
CC
=
2.0V
1000
ns
V
CC
=
4.5V
500
ns
V
CC
=
6.0V
400
ns
Symbol
Parameter
Conditions
V
CC
T
A
=
25
°
C
T
A
=
-
40 to 85
°
C
Units
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
2.0V
1.5
1.5
V
Input Voltage
4.5V
3.15
3.15
V
6.0V
4.2
4.2
V
V
IL
Maximum LOW Level
2.0V
0.5
0.5
V
Input Voltage
4.5V
1.35
1.35
V
6.0V
1.8
1.8
V
V
OH
Minimum HIGH Level
V
IN
=
V
IH
or V
IL
Output Voltage
| I
OUT
|
20
µ
A
2.0V
2.0
1.9
1.9
V
4.5V
4.5
4.4
4.4
V
6.0V
6.0
5.9
5.9
V
V
IN
=
V
IH
or V
IL
|I
OUT
|
4.0 mA
4.5V
4.2
3.98
3.84
V
| I
OUT
|
5.2 mA
6.0V
5.7
5.48
5.34
V
V
OL
Maximum LOW Level
V
IN
=
V
IH
or V
IL
Output Voltage
| I
OUT
|
20
µ
A
2.0V
0
0.1
0.1
V
4.5V
0
0.1
0.1
V
6.0V
0
0.1
0.1
V
V
IN
=
V
IH
or V
IL
| I
OUT
|
4.0 mA
4.5V
0.2
0.26
0.33
V
| I
OUT
|
5.2 mA
6.0V
0.2
0.26
0.33
V
I
IN
Maximum Input
V
IN
=
V
CC
or GND
6.0V
±
0.1
±
1.0
µ
A
Current
I
CC
Maximum Quiescent
V
IN
=
V
CC
or GND
6.0V
8.0
80
µ
A
Supply Current
I
OUT
=
0
µ
A
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4
MM
74HC138
AC Electrical Characteristics
V
CC
=
5V, T
A
=
25
°
C, C
L
=
15 pF, t
r
=
t
f
=
6 ns
AC Electrical Characteristics
C
L
=
50 pF, t
r
=
t
f
=
6 ns (unless otherwise specified)
Note 6: C
PD
determines the no load dynamic power consumption, P
D
=
C
PD
V
CC
2
f
+
I
CC
V
CC
, and the no load dynamic current consumption,
I
S
=
C
PD
V
CC
f
+
I
CC
.
Symbol
Parameter
Conditions
Typ
Guaranteed
Units
Limit
t
PLH
Maximum Propagation
18
25
ns
Delay, Binary Select to any Output
t
PHL
Maximum Propagation
28
35
ns
Delay, Binary Select to any Output
t
PHL
, t
PLH
Maximum Propagation
18
25
ns
Delay, G1 to any Output
t
PHL
Maximum Propagation
23
30
ns
Delay G2A or G2B to
Output
t
PLH
Maximum Propagation
18
25
ns
Delay G2A or G2B to Output
Symbol
Parameter
Conditions
V
CC
T
A
=
25
°
C
T
A
=
-
40 to 85
°
C
Units
Typ
Guaranteed Limits
t
PLH
Maximum Propagation
2.0V
75
150
189
ns
Delay Binary Select to
4.5V
15
30
38
ns
any Output LOW-to-HIGH
6.0V
13
26
32
ns
t
PHL
Maximum Propagation
2.0V
100
200
252
ns
Delay Binary Select to any
4.5V
20
40
50
ns
Output HIGH-to-LOW
6.0V
17
34
43
ns
t
PHL
, t
PLH
Maximum Propagation
2.0V
75
150
189
ns
Delay G1 to any
4.5V
15
30
38
ns
Output
6.0V
13
26
32
ns
t
PHL
Maximum Propagation
2.0V
82
175
221
ns
Delay G2A or G2B to
4.5V
28
35
44
ns
Output
6.0V
22
30
37
ns
t
PLH
Maximum Propagation
2.0V
75
150
189
ns
Delay G2A or G2B to
4.5V
15
30
38
ns
Output
6.0V
13
26
32
ns
t
TLH
, t
THL
Output Rise and
2.0V
30
75
95
ns
Fall Time
4.5V
8
15
19
ns
6.0V
7
13
16
ns
C
IN
Maximum Input
3
10
10
pF
Capacitance
C
PD
Power Dissipation
(Note 6)
75
pF
Capacitance
5
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MM74HC138
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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