© 2001 Fairchild Semiconductor Corporation
DS500505
www.fairchildsemi.com
August 2001
Revised August 2001
FI
N1531 5V
L
V
DS 4-Bi
t High Speed D
i
f
f
er
enti
al Dri
ver
FIN1531
5V LVDS 4-Bit High Speed Differential Driver
General Description
This quad driver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The driver translates 5V TTL/CMOS signal levels to
LVDS levels with a typical differential output swing of 350
mV which provides low EMI at ultra low power dissipation
even at high frequencies. This device is ideal for high
speed transfer of clock and data.
The FIN1531 can be paired with its companion receiver,
the FIN1532, or with any other Fairchild LVDS receiver.
Features
s
Greater than 400Mbs data rate
s
5V power supply operation
s
400ps max differential pulse skew
s
2.0ns maximum propagation delay
s
Low power dissipation
s
Power-Off protection
s
Meets or exceeds the TIA/EIA-644 LVDS standard
s
Pin compatible with equivalent RS-422 and
PECL devices
s
16-Lead SOIC and TSSOP packages save space
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Function Table
H
=
HIGH Logic Level
L
=
LOW Logic Level
X
=
Don't Care
Z
=
High Impedance
Connection Diagram
Pin Descriptions
Order Number
Package Number
Package Description
FIN1531M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
FIN1531MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Input
Outputs
EN
EN
D
IN
D
OUT
+
D
OUT
-
H
X
H
H
L
H
X
L
L
H
H
X
OPEN
L
H
X
L
H
H
L
X
L
L
L
H
X
L
OPEN
L
H
L
H
X
Z
Z
Pin Name
Description
D
IN1
, D
IN2
, D
IN3
, D
IN4
5V TTL/CMOS Data Input
D
OUT1
+
, D
OUT2
+
, D
OUT3
+
, D
OUT4
+
Non-inverting LVDS Output
D
OUT1
-
, D
OUT2
-
, D
OUT3
-
, D
OUT4
-
Inverting LVDS Output
EN
Driver Enable Pin
EN
Inverting Driver Enable Pin
V
CC
Power Supply
GND
Ground
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2
FIN1531
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: The "Absolute Maximum Ratings": are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperature and output/input loading variables. Fairchild
does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 2: All typical values are at T
A
=
25
°
C and with V
CC
=
5.0V.
Supply Voltage (V
CC
)
-
0.5V to
+
6V
DC Input Voltage (V
IN
)
-
0.5V to
+
6V
DC Output Voltage (V
OUT
)
-
0.5V to
+
6V
Driver Short Circuit Current (I
OSD
)
Continuous
Storage Temperature Range (T
STG
)
-
65
°
C to
+
150
°
C
Max Junction Temperature (T
J
)
150
°
C
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
°
C
ESD (Human Body Model)
8000V
ESD (Machine Model)
400V
Supply Voltage (V
CC
)
4.5V to 5.5V
Input Voltage (V
IN
)
0 to V
CC
Operating Temperature (T
A
)
-
40
°
C to
+
85
°
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 2)
V
OD
Output Differential Voltage
250
350
450
mV
V
OD
V
OD
Magnitude Change from
RL
=
100
, driver enabled,
25
mV
Differential LOW-to-HIGH
See Figure 1
V
OS
Offset Voltage
1.125
1.25
1.375
V
V
OS
Offset Magnitude Change from
25
mV
Differential LOW-to-HIGH
I
OFF
Power Off Output Current
V
CC
=
0V, V
OUT
=
5.5V
50
µ
A
I
OS
Short Circuit Output Current
V
OUT
=
0V, Driver Enabled
-
6
mA
V
OD
=
0V, Driver Enabled
±
6
V
IH
Input HIGH Voltage
2.0
V
CC
V
V
IL
Input LOW Voltage
GND
0.8
V
I
IN
Input Current
V
IN
=
0V or V
CC
±
20
µ
A
I
I(OFF)
Power-OFF Input Current
V
CC
=
0V, V
IN
=
5.5V
50
µ
A
I
OZ
Disabled Output Leakage Current
EN
=
0.8V, EN
=
2.0V,
±
20
µ
A
V
OUT
=
0V or 7V
V
IK
Input Clamp Voltage
I
IK
=
-
18 mA
-
1.5
-
0.8
V
I
CC
Power Supply Current
No Load, V
IN
=
0V or V
CC
, Driver Enabled
3.3
6
mA
R
L
=
100
, Driver Disabled
3.4
6
R
L
=
100
, V
IN
=
0V or V
CC
, Driver Enabled
18
26
C
IN
Input Capacitance
7
pF
C
OUT
Output Capacitance
4.5
pF
3
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FI
N1531
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Note 3: All typical values are at T
A
=
25
°
C and with V
CC
=
5V.
Note 4: t
SK(LH)
, t
SK(HL)
is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direc-
tion.
Note 5: t
SK(PP)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
Note 6: f
MAX
Criteria: Input t
R
=
t
F
<
1 ns, 0V to 3V, 50% Duty Cycle; Output V
OD
>
250 mV, 45% to 55% Duty Cycle; all output channels switching in phase.
Note 7: Test Circuits in Figure 2 and Figure 4 are simplified representations of test fixture and DUT loading.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
(Note 3)
t
PLHD
Differential Propagation Delay
0.5
1.4
2.0
ns
LOW-to-HIGH
t
PHLD
Differential Propagation Delay
0.5
1.4
2.0
ns
HIGH-to-LOW
R
L
=
100
, C
L
=
10 pF,
t
TLHD
Differential Output Rise Time (20% to 80%) See Figure 2 and Figure 3 (Note 7)
0.6
0.8
1.2
ns
t
THLD
Differential Output Fall Time (80% to 20%)
0.6
0.8
1.2
ns
t
SK(P)
Pulse Skew |t
PLH
- t
PHL
|
0.4
ns
t
SK(LH)
,
Channel-to-Channel Skew
0.3
ns
t
SK(HL)
(Note 4)
t
SK(PP)
Part-to-Part Skew (Note 5)
1.0
ns
f
MAX
Maximum Frequency(Note 6)
200
250
ns
t
ZHD
LVTTL Output Enable Time from Z to HIGH R
L
=
100
, C
L
=
10 pF,
5.0
ns
t
ZLD
LVTTL Output Enable Time from Z to LOW
See Figure 4 and Figure 5 (Note 7)
5.0
ns
t
HZD
LVTTL Output Disable Time from HIGH to Z
5.0
ns
t
LZD
LVTTL Output Disable Time from LOW to Z
5.0
ns
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4
FIN1531
FIGURE 1. Differential Driver DC Test Circuit
Note A: Input pulses have frequency
=
10 MHz, t
R
or t
F
=
1 ns
Note B: C
L
includes all probe and jig capacitances
FIGURE 2. Differential Driver Propagation Delay and
Transition Time Test Circuit
FIGURE 3. AC Waveforms
Note A: Input pulses have the following characteristics:
Frequency
=
10 MHz, t
R
or t
F
=
1 ns
Note B: C
L
includes probes and jig capacitance
FIGURE 4. Differential Driver Enable and
Disable Test Circuit
FIGURE 5. Enable and Disable AC Waveforms
5
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FI
N1531
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
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