© 2000 Fairchild Semiconductor Corporation
DS006466
www.fairchildsemi.com
August 1986
Revised April 2000
DM74S138 · D
M
74S139
Decoder
/
Demul
t
i
p
lexer
DM74S138 · DM74S139
Decoder/Demultiplexer
General Description
These Schottky-clamped circuits are designed to be used
in high-performance memory-decoding or data-routing
applications, requiring very short propagation delay times.
In high-performance memory systems these decoders can
be used to minimize the effects of system decoding. When
used with high-speed memories, the delay times of these
decoders are usually less than the typical access time of
the memory. This means that the effective system delay
introduced by the decoder is negligible.
The DM74S138 decodes one-of-eight lines, based upon
the conditions at the three binary select inputs and the
three enable inputs. Two active-LOW and one active-HIGH
enable inputs reduce the need for external gates or invert-
ers when expanding. A 24-line decoder can be imple-
mented with no external inverters, and a 32-line decoder
requires only one inverter. An enable input can be used as
a data input for demultiplexing applications.
The DM74S139 comprises two separate two-line-to-four-
line decoders in a single package. The active-LOW enable
input can be used as a data line in demultiplexing applica-
tions.
All of these decoders/demultiplexers feature fully buffered
inputs, presenting only one normalized load to its driving
circuit. All inputs are clamped with high-performance
Schottky diodes to suppress line-ringing and simplify sys-
tem design.
Features
s
Designed specifically for high speed:
Memory decoders
Data transmission systems
s
DM74S138 3-to-8-line decoders incorporates 3 enable
inputs to simplify cascading and/or data reception
s
DM74S139 contains two fully independent 2-to-4-line
decoders/demultiplexers
s
Schottky clamped for high performance
s
Typical propagation delay time (3 levels of logic)
DM74S138
8 ns
DM74S139
7.5 ns
s
Typical power dissipation
DM74S138
245 mW
DM74S139
300 mW
Ordering Code:
Order Number
Package Number
Package Description
DM74S138N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74S139N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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2
DM74S138
·
D
M
74S139
Connection Diagrams
DM74S138
DM74S139
Function Tables
DM74S138
DM74S139
* G2
=
G2A
+
G2B
H
=
HIGH level
L
=
LOW level
X
=
don't care (either LOW or HIGH logic level)
Logic Diagrams
DM74S138
DM74S139
Inputs
Outputs
Enable
Select
G1
G2* C B A Y0
Y1
Y2
Y3 Y4 Y5 Y6 Y7
X
H
X X X
H
H
H
H
H
H
H
H
L
X
X X X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
H H
H
H
H
L
H
H
H
H
H
L
H
L
L
H
H
H
H
L
H
H
H
H
L
H
L
H
H
H
H
H
H
L
H
H
H
L
H H
L
H
H
H
H
H
H
L
H
H
L
H H H
H
H
H
H
H
H
H
L
Inputs
Outputs
Enable
Select
G
B
A
Y0
Y1
Y2
Y3
H
X
X
H
H
H
H
L
L
L
L
H
H
H
L
L
H
H
L
H
H
L
H
L
H
H
L
H
L
H
H
H
H
H
L
3
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DM74S138
·
D
M
74S139
Absolute Maximum Ratings
(Note 1)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted)
Note 2: All typicals are at V
CC
=
5V, T
A
=
25
°
C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 4: I
CC
is measured with all outputs enabled and OPEN.
Supply Voltage
7V
Input Voltage
5.5V
Operating Free Air Temperature Range
0
°
C to
+
70
°
C
Storage Temperature Range
-
65
°
C to
+
150
°
C
Symbol
Parameter
Min
Nom
Max
Units
V
CC
Supply Voltage
4.75
5
5.25
V
V
IH
HIGH Level Input Voltage
2
V
V
IL
LOW Level Input Voltage
0.8
V
I
OH
HIGH Level Output Current
-
1
mA
I
OL
LOW Level Output Current
20
mA
T
A
Free Air Operating Temperature
0
70
°
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 2)
V
I
Input Clamp Voltage
V
CC
=
Min, I
I
=
-
18 mA
-
1.2
V
V
OH
HIGH Level
V
CC
=
Min, I
OH
=
Max
2.7
3.4
V
Output Voltage
V
IL
=
Max, V
IH
=
Min
V
OL
LOW Level
V
CC
=
Min, I
OL
=
Max
0.5
V
Output Voltage
V
IH
=
Min, V
IL
=
Max
I
I
Input Current @ Max Input Voltage
V
CC
=
Max, V
I
=
5.5V
1
mA
I
IH
HIGH Level Input Current
V
CC
=
Max, V
I
=
2.7V
50
µ
A
I
IL
LOW Level Input Current
V
CC
=
Max, V
I
=
0.5V
-
2
mA
I
OS
Short Circuit Output Current
V
CC
=
Max (Note 3)
-
40
-
100
mA
I
CC
Supply Current (DM74S138)
V
CC
=
Max (Note 4)
49
74
mA
I
CC
Supply Current (DM74S139)
V
CC
=
Max (Note 4)
60
90
mA
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4
DM74S138
·
D
M
74S139
DM74S138 Switching Characteristics
at V
CC
=
5V and T
A
=
25
°
C
DM74S139 Switching Characteristics
at V
CC
=
5V and T
A
=
25
°
C
R
L
=
280
Symbol
Parameter
From (Input)
Levels
C
L
=
15 pF
C
L
=
50 pF
Units
To (Output)
of Delay
Min
Max
Min
Max
t
PLH
Propagation Delay Time
Select to Output
2
7
9
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Select to Output
2
10.5
14
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Select to Output
3
12
14
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Select to Output
3
12
15
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Enable to Output
2
8
10
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Enable to Output
2
11
14
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Enable to Output
3
11
13
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Enable to Output
3
11
14
ns
HIGH-to-LOW Level Output
R
L
=
280
Symbol
Parameter
From (Input)
Levels
C
L
=
15 pF
C
L
=
50 pF
Units
To (Output)
of Delay
Min
Max
Min
Max
t
PLH
Propagation Delay Time
Select to Output
2
7.5
10
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Select to Output
2
10
13
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Select to Output
3
12
13
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Select to Output
3
12
15
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Enable to Output
2
8
10
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Enable to Output
2
10
13
ns
HIGH-to-LOW Level Output
5
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DM74S138
·
D
M
74S139
Decoder
/
Demul
t
i
p
lexer
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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