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Part Number DM74ALS373

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© 2000 Fairchild Semiconductor Corporation
DS006220
www.fairchildsemi.com
April 1984
Revised February 2000
DM74ALS373 Octal
D
-
T
ype 3-ST
A
T
E
T
r
anspare
n
t Latch
DM74ALS373
Octal D-Type 3-STATE Transparent Latch
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the DM74ALS373 are transparent D-
type latches. While the enable (G) is HIGH the Q outputs
will follow the data (D) inputs. When the enable is taken
LOW the output will be latched at the level of the data that
was set up.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the latches. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
Features
s
Switching specifications at 50 pF
s
Switching specifications guaranteed over full tempera-
ture and V
CC
range
s
Advanced oxide-isolated, ion-implanted Schottky TTL
process
s
Functionally and pin for pin compatible with LS TTL
counterpart
s
Improved AC performance over DM74LS373 at approxi-
mately half the power
s
3-STATE buffer-type outputs drive bus lines directly
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Order Number
Package Number
Package Description
DM74ALS373WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74ALS373SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74ALS373N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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2
D
M
74ALS373
Function Table
L
=
LOW State
H
=
HIGH State
X
=
Don't Care
Z
=
High Impedance State
Q
0
=
Previous Condition of Q
Logic Diagram
Output
Enable
D
Output
Control
G
Q
L
H
H
H
L
H
L
L
L
L
X
Q
0
H
X
X
Z
3
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DM74ALS373
Absolute Maximum Ratings
(Note 1)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 2: The (
) arrow indicates the negative edge of the enable is used for reference.
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at V
CC
=
5V, T
A
=
25
°
C.
Supply Voltage
7V
Input Voltage
7V
Voltage Applied to Disabled Output
5.5V
Operating Free Air Temperature Range
0
°
C to
+
70
°
C
Storage Temperature Range
-
65
°
C to
+
150
°
C
Typical
JA
N Package
57.0
°
C/W
M Package
76.0
°
C/W
Symbol
Parameter
Min
Nom
Max
Units
V
CC
Supply Voltage
4.5
5
5.5
V
V
IH
HIGH Level Input Voltage
2
V
V
IL
LOW Level Input Voltage
0.8
V
I
OH
HIGH Level Output Current
-
2.6
mA
I
OL
LOW Level Output Current
24
mA
t
W
Width of Enable Pulse, HIGH or LOW
10
ns
t
SU
Data Setup Time (Note 2)
10
ns
t
H
Data Hold Time (Note 2)
7
ns
T
A
Free Air Operating Temperature
0
70
°
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IK
Input Clamp Voltage
V
CC
=
4.5V, I
I
=
-
18 mA
-
1.5
V
V
OH
HIGH Level
V
CC
=
4.5V
I
OH
=
-
2.6 mA
2.4
3.3
V
Output Voltage
V
CC
=
4.5V to 5.5V
V
CC
-
2
V
I
OH
=
-
400
µ
A
V
OL
LOW Level
V
CC
=
4.5V
I
OL
=
24 mA
0.35
0.5
V
Output Voltage
I
I
Input Current at Maximum
V
CC
=
5.5V
0.1
mA
Input Voltage
V
IH
=
7V
I
IH
HIGH Level Input Current
V
CC
=
5.5V, V
IH
=
2.7V
20
µ
A
I
IL
LOW Level Input Current
V
CC
=
5.5V, V
IL
=
0.4V
-
0.1
mA
I
O
Output Drive Current
V
CC
=
5.5V
V
O
=
2.25V
-
30
-
112
mA
I
OZH
OFF-State Output Current
V
CC
=
5.5V
20
µ
A
HIGH Level Voltage Applied
V
O
=
2.7V
I
OZL
OFF-State Output Current
V
CC
=
5.5V
-
20
µ
A
LOW Level Voltage Applied
V
O
=
0.4V
I
CC
Supply Current
V
CC
=
5.5V
Outputs HIGH
9
16
mA
Outputs OPEN
Outputs LOW
16
25
mA
Outputs Disabled
17
27
mA
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4
D
M
74ALS373
Switching Characteristics
over recommended operating free air temperature range
Symbol
Parameter
Conditions
From To
Min
Max
Units
t
PLH
Propagation Delay Time
V
CC
=
4.5V to 5.5V
Data
Any Q
2
12
ns
LOW-to-HIGH Level Output
R
L
=
500
t
PHL
Propagation Delay Time
C
L
=
50 pF
Data
Any Q
4
16
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
Enable
Any Q
6
22
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
Enable
Any Q
7
23
ns
HIGH-to-LOW Level Output
t
PZH
Output Enable Time
Output
Any Q
6
18
ns
to HIGH Level Output
Control
t
PZL
Output Enable Time
Output
Any Q
5
20
ns
to LOW Level Output
Control
t
PHZ
Output Disable Time
Output
Any Q
2
10
ns
from HIGH Level Output
Control
t
PLZ
Output Disable Time
Output
Any Q
2
12
ns
from LOW Level Output
Control
5
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DM74ALS373
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B