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Part Number DM7490A

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© 2000 Fairchild Semiconductor Corporation
DS006533
www.fairchildsemi.com
August 1986
Revised March 2000
DM7490A Decade and B
i
nar
y
Count
ers
DM7490A
Decade and Binary Counters
General Description
The DM7490A monolithic counter contains four master-
slave flip-flops and additional gating to provide a divide-by-
two counter and a three-stage binary counter for which the
count cycle length is divide-by-five.
The counter has a gated zero reset and also has gated set-
to-nine inputs for use in BCD nine's complement applica-
tions.
To use the maximum count length (decade or four-bit
binary), the B input is connected to the Q
A
output. The
input count pulses are applied to input A and the outputs
are as described in the appropriate Function Table. A sym-
metrical divide-by-ten count can be obtained from the
counters by connecting the Q
D
output to the A input and
applying the input count to the B input which gives a divide-
by-ten square wave at output Q
A
.
Features
s
Typical power dissipation
145 mW
s
Count frequency 42 MHz
Ordering Code:
Connection Diagram
Order Number
Package Number
Package Description
DM7490AN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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2
DM
749
0A
Function Tables
BCD Count Sequence (Note 1)
BCD Bi-Quinary (5-2) (Note 2)
Reset/Count Function Table
H
=
HIGH Level
L
=
LOW Level
X
=
Don't Care
Note 1: Output QA is connected to input B for BCD count.
Note 2: Output QD is connected to input A for bi-quinary count
Logic Diagram
The J and K inputs shown without connection are for reference only and
are functionally at a HIGH level.
Count
Outputs
Q
D
Q
C
Q
B
Q
A
0
L
L
L
L
1
L
L
L
H
2
L
L
H
L
3
L
L
H
H
4
L
H
L
L
5
L
H
L
H
6
L
H
H
L
7
L
H
H
H
8
H
L
L
L
9
H
L
L
H
Count
Outputs
Q
A
Q
D
Q
C
Q
B
0
L
L
L
L
1
L
L
L
H
2
L
L
H
L
3
L
L
H
H
4
L
H
L
L
5
H
L
L
L
6
H
L
L
H
7
H
L
H
L
8
H
L
H
H
9
H
H
L
L
Reset Inputs
Outputs
R0(1)
R0(2)
R9(1)
R9(2)
Q
D
Q
C
Q
B
Q
A
H
H
L
X
L
L
L
L
H
H
X
L
L
L
L
L
X
X
H
H
H
L
L
H
X
L
X
L
COUNT
L
X
L
X
COUNT
L
X
X
L
COUNT
X
L
L
X
COUNT
3
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DM7490A
Absolute Maximum Ratings
(Note 3)
Note 3: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 4: T
A
=
25
°
C and V
CC
=
5V.
DC Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 5: All typicals are at V
CC
=
5V, T
A
=
25
°
C.
Note 6: Q
A
outputs are tested at I
OL
=
Max plus the limit value of I
IL
for the B input. This permits driving the B input while maintaining full fan-out capability.
Note 7: Not more than one output should be shorted at a time.
Note 8: I
CC
is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5V, and all other inputs grounded.
Supply Voltage
7V
Input Voltage
5.5V
Operating Free Air Temperature Range
0
°
C to
+
70
°
C
Storage Temperature Range
-
65
°
C to
+
150
°
C
Symbol
Parameter
Min
Nom
Max
Units
V
CC
Supply Voltage
4.75
5
5.25
V
V
IH
HIGH Level Input Voltage
2
V
V
IL
LOW Level Input Voltage
0.8
V
I
OH
HIGH Level Output Current
-
0.8
mA
I
OL
LOW Level Output Current
16
mA
f
CLK
Clock Frequency
A
0
32
MHz
(Note 4)
B
0
16
t
W
Pulse Width
A
15
(Note 4)
B
30
ns
Reset
15
t
REL
Reset Release Time (Note 4)
25
ns
T
A
Free Air Operating Temperature
0
70
°
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 5)
V
I
Input Clamp Voltage
V
CC
=
Min, I
I
=
-
12 mA
-
1.5
V
V
OH
HIGH Level
V
CC
=
Min, I
OH
=
Max
2.4
3.4
V
Output Voltage
V
IL
=
Max, V
IH
=
Min
V
OL
LOW Level
V
CC
=
Min, I
OL
=
Max
0.2
0.4
V
Output Voltage
V
IH
=
Min, V
IL
=
Max (Note 6)
I
I
Input Current @ Max Input Voltage V
CC
=
Max, V
I
=
5.5V
1
mA
I
IH
HIGH Level
V
CC
=
Max
A
80
Input Current
V
I
=
2.7V
Reset
40
µ
A
B
120
I
IL
LOW Level
V
CC
=
Max
A
-
3.2
Input Current
V
I
=
0.4V
Reset
-
1.6
mA
B
-
4.8
I
OS
Short Circuit Output Current
V
CC
=
Max (Note 7)
-
18
-
57
mA
I
CC
Supply Current
V
CC
=
Max (Note 8)
29
42
mA
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4
DM
749
0A
AC Switching Characteristics
at V
CC
=
5V and T
A
=
25
°
C
Symbol
Parameter
From (Input)
R
L
=
400
, C
L
=
15 pF
Units
To (Output)
Min
Max
f
MAX
Maximum Clock
A to Q
A
32
MHz
Frequency
B to Q
B
16
t
PLH
Propagation Delay Time
A to Q
A
16
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
A to Q
A
18
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
A to Q
D
48
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
A to Q
D
50
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
B to Q
B
16
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
B to Q
B
21
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
B to Q
C
32
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
B to Q
C
35
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
B to Q
D
32
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
B to Q
D
35
ns
HIGH-to-LOW Level Output
t
PLH
Propagation Delay Time
SET-9 to Q
A
, Q
D
30
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
SET-9 to Q
B
, Q
C
40
ns
HIGH-to-LOW Level Output
t
PHL
Propagation Delay Time
SET-0
40
ns
HIGH-to-LOW Level Output
Any Q
5
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DM7490A Decade and B
i
nar
y
Count
ers
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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