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Part Number CD4047BC

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October 1987
Revised May 1999
CD404
7BC

Low Power
Monost
able/
Ast
able
Mult
ivi
b
rat
o
r
© 1999 Fairchild Semiconductor Corporation
DS005969.prf
www.fairchildsemi.com
CD4047BC
Low Power Monostable/Astable Multivibrator
General Description
The CD4047B is capable of operating in either the
monostable or astable mode. It requires an external capac-
itor (between pins 1 and 3) and an external resistor
(between pins 2 and 3) to determine the output pulse width
in the monostable mode, and the output frequency in the
astable mode.
Astable operation is enabled by a high level on the astable
input or low level on the astable input. The output fre-
quency (at 50% duty cycle) at Q and Q outputs is deter-
mined by the timing components. A frequency twice that of
Q is available at the Oscillator Output; a 50% duty cycle is
not guaranteed.
Monostable operation is obtained when the device is trig-
gered by LOW-to-HIGH transition at
+
trigger input or
HIGH-to-LOW transition at
-
trigger input. The device can
be retriggered by applying a simultaneous LOW-to-HIGH
transition to both the
+
trigger and retrigger inputs.
A high level on Reset input resets the outputs Q to LOW, Q
to HIGH.
Features
s
Wide supply voltage range:
3.0V to 15V
s
High noise immunity:
0.45 V
DD
(typ.)
s
Low power TTL compatibility:
Fan out of 2 driving 74L
or 1 driving 74LS
SPECIAL FEATURES
s
Low power consumption: special CMOS oscillator
configuration
s
Monostable (one-shot) or astable (free-running)
operation
s
True and complemented buffered outputs
s
Only one external R and C required
MONOSTABLE MULTIVIBRATOR FEATURES
s
Positive- or negative-edge trigger
s
Output pulse width independent of trigger pulse duration
s
Retriggerable option for pulse width expansion
s
Long pulse widths possible using small RC components
by means of external counter provision
s
Fast recovery time essentially independent of pulse
width
s
Pulse-width accuracy maintained at duty cycles
approaching 100%
ASTABLE MULTIVIBRATOR FEATURES
s
Free-running or gatable operating modes
s
50% duty cycle
s
Oscillator output available
s
Good astable frequency stability
typical
=
±
2%
+
0.03%/
°
C @ 100 kHz
frequency
=
±
0.5%
+
0.015%/
°
C @ 10 kHz
deviation (circuits trimmed to frequency V
DD
=
10V
±
10%)
Applications
· Frequency discriminators
· Timing circuits
· Time-delay applications
· Envelope detection
· Frequency multiplication
· Frequency division
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Order Number
Package Number
Package Description
CD4047BCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
CD4047BCN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
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2
C
D
40
47BC
Connection Diagram
Pin Assignments for SOIC and DIP
Top View
Function Table
Note 1: External resistor between terminals 2 and 3. External capacitor between terminals 1 and 3.
Typical Implementation of External Countdown Option
t
EXT
=
(N
-
1) t
A
+
(t
M
+
t
A
/2)
FIGURE 1.
Terminal Connections
Output Pulse
Typical Output
Function
To V
DD
To V
SS
Input Pulse
From
Period or
To
Pulse Width
Astable Multivibrator
Free-Running
4, 5, 6, 14
7, 8, 9, 12
10, 11, 13
t
A
(10, 11)
=
4.40 RC
True Gating
4, 6, 14
7, 8, 9, 12
5
10, 11, 13
t
A
(13)
=
2.20 RC
Complement Gating
6, 14
5, 7, 8, 9, 12
4
10, 11, 13
Monostable Multivibrator
Positive-Edge Trigger
4, 14
5, 6, 7, 9, 12
8
10, 11
Negative-Edge Trigger
4, 8, 14
5, 7, 9, 12
6
10, 11
t
M
(10, 11)
=
2.48 RC
Retriggerable
4, 14
5, 6, 7, 9
8, 12
10, 11
External Countdown (Note 1) 14
5, 6, 7, 8, 9, 12
Figure 1
Figure 1
Figure 1
3
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CD404
7BC
Block Diagram
Logic Diagram
*Special input protection circuit to permit larger input-voltage swings.
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4
C
D
40
47BC
Absolute Maximum Ratings
(Note 2)
(Note 3)
Recommended Operating
Conditions
(Note 3)
Note 2: "Absolute Maximum Ratings" are those values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be operated at these limits. The table of "Recom-
mended Operating Conditions" and "Electrical Characteristics" provides
conditions for actual device operation.
Note 3: V
SS
=
0V unless otherwise specified.
DC Electrical Characteristics
(Note 3)
Note 4: I
OH
and I
OL
are tested one output at a time.
DC Supply Voltage (V
DD
)
-
0.5V to
+
18V
DC
Input Voltage (V
IN
)
-
0.5V to V
DD
+
0.5V
DC
Storage Temperature Range (T
S
)
-
65
°
C to
+
150
°
C
Power Dissipation (P
D
)
Dual-In-Line
700 mW
Small Outline
500 mW
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
°
C
DC Supply Voltage (V
DD
)
3V to 15V
DC
Input Voltage (V
IN
)
0 to V
DD
V
DC
Operating Temperature Range (T
A
)
-
40
°
C to
+
85
°
C
Symbol
Parameter
Conditions
-
40
°
C
25
°
C
85
°
C
Units
Min
Max
Min
Typ
Max
Min
Max
I
DD
Quiescent Device Current
V
DD
=
5V
20
20
150
µ
A
V
DD
=
10V
40
40
300
µ
A
V
DD
=
15V
80
80
600
µ
A
V
OL
LOW Level Output Voltage
|I
O
|
<
1
µ
A
V
DD
=
5V
0.05
0
0.05
0.05
V
V
DD
=
10V
0.05
0
0.05
0.05
V
V
DD
=
15V
0.05
0
0.05
0.05
V
V
OH
HIGH Level Output Voltage
|I
O
|
<
1
µ
A
V
DD
=
5V
4.95
4.95
5
4.95
V
V
DD
=
10V
9.95
9.95
10
9.95
V
V
DD
=
15V
14.95
14.95
15
14.95
V
V
IL
LOW Level Input Voltage
V
DD
=
5V, V
O
=
0.5V or 4.5V
1.5
2.25
1.5
1.5
V
V
DD
=
10V, V
O
=
1V or 9V
3.0
4.5
3.0
3.0
V
V
DD
=
15V, V
O
=
1.5V or 13.5V
4.0
6.75
4.0
4.0
V
V
IH
HIGH Level Input Voltage
V
DD
=
5V, V
O
=
0.5V or 4.5V
3.5
3.5
2.75
3.5
V
V
DD
=
10V, V
O
=
1V or 9V
7.0
7.0
5.5
7.0
V
V
DD
=
15V, V
O
=
1.5V or 13.5V
11.0
11.0
8.25
11.0
V
I
OL
LOW Level Output Current
V
DD
=
5V, V
O
=
0.4V
0.52
0.44
0.88
0.36
mA
(Note 4)
V
DD
=
10V, V
O
=
0.5V
1.3
1.1
2.25
0.9
mA
V
DD
=
15V, V
O
=
1.5V
3.6
3.0
8.8
2.4
mA
I
OH
HIGH Level Output Current
V
DD
=
5V, V
O
=
4.6V
-
0.52
-
0.44
-
0.88
-
0.36
mA
(Note 4)
V
DD
=
10V, V
O
=
9.5V
-
1.3
-
1.1
-
2.25
-
0.9
mA
V
DD
=
15V, V
O
=
13.5V
-
3.6
-
3.0
-
8.8
-
2.4
mA
I
IN
Input Current
V
DD
=
15V, V
IN
=
0V
-
0.3
-
10
-
5
-
0.3
-
1.0
µ
A
V
DD
=
15V, V
IN
=
15V
0.3
10
-
5
0.3
1.0
µ
A
5
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CD404
7BC
AC Electrical Characteristics
(Note 5)
T
A
=
25
°
C, C
L
=
50 pF, R
L
=
200k, input t
r
=
t
f
=
20 ns, unless otherwise specified.
Note 5: AC Parameters are guaranteed by DC correlated testing.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHL
, t
PLH
Propagation Delay Time Astable,
V
DD
=
5V
200
400
ns
Astable to Osc Out
V
DD
=
10V
100
200
ns
V
DD
=
15V
80
160
ns
t
PHL
, t
PLH
Astable, Astable to Q, Q
V
DD
=
5V
550
900
ns
V
DD
=
10V
250
500
ns
V
DD
=
15V
200
400
ns
t
PHL
, t
PLH
+
Trigger,
-
Trigger to Q
V
DD
=
5V
700
1200
ns
V
DD
=
10V
300
600
ns
V
DD
=
15V
240
480
ns
t
PHL
, t
PLH
+
Trigger, Retrigger to Q
V
DD
=
5V
300
600
ns
V
DD
=
10V
175
300
ns
V
DD
=
15V
150
250
ns
t
PHL
, t
PLH
Reset to Q, Q
V
DD
=
5V
300
600
ns
V
DD
=
10V
125
250
ns
V
DD
=
15V
100
200
ns
t
THL
, t
TLH
Transition Time Q, Q, Osc Out
V
DD
=
5V
100
200
ns
V
DD
=
10V
50
100
ns
V
DD
=
15V
40
80
ns
t
WL
, t
WH
Minimum Input Pulse Duration
Any Input
V
DD
=
5V
500
1000
ns
V
DD
=
10V
200
400
ns
V
DD
=
15V
160
320
ns
t
RCL
, t
FCL
+
Trigger, Retrigger, Rise and
V
DD
=
5V
15
µ
s
Fall Time
V
DD
=
10V
5
µ
s
V
DD
=
15V
5
µ
s
C
IN
Average Input Capacitance
Any Input
5
7.5
pF