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Part Number 74F537

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© 1999 Fairchild Semiconductor Corporation
DS009550
www.fairchildsemi.com
April 1988
Revised August 1999
7
4F537 1-of
-10 Decoder

wit
h
3-ST
A
T
E
Out
puts
74F537
1-of-10 Decoder with 3-STATE Outputs
General Description
The 74F537 is one-of-ten decoder/demultiplexer with four
active HIGH BCD inputs and ten mutually exclusive out-
puts. A polarity control input determines whether the out-
puts are active LOW or active HIGH. The 74F537 has 3-
STATE outputs, and a HIGH signal on the Output Enable
(OE) input forces all outputs to the high impedance state.
Two input enables, active HIGH E
2
and active LOW E
1
, are
available for demultiplexing data to the selected output in
either non-inverted or inverted form. Input codes greater
than BCD nine cause all outputs to go to the inactive state
(i.e., same polarity as the P input).
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number
Package Number
Package Description
74F537SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F537PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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2
74F537
Unit Loading/Fan Out
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Pin Names
Description
U.L.
Input I
IH
/I
IL
HIGH/LOW
Output I
OH
/I
OL
A
0
­A
3
Address Inputs
1.0/1.0
20
µ
A/
-
0.6 mA
E
1
Enable Input (Active LOW)
1.0/1.0
20
µ
A/
-
0.6 mA
E
2
Enable Input (Active HIGH)
1.0/1.0
20
µ
A/
-
0.6 mA
OE
Output Enable Input (Active LOW)
1.0/1.0
20
µ
A/
-
0.6 mA
P
Polarity Control Input
1.0/1.0
20
µ
A/
-
0.6 mA
O
0
­O
9
3-STATE Outputs
150/40 (33.3)
-
3 mA/24 mA (20 mA)
Function
Inputs
Outputs
OE E
1
E
2
A
3
A
2
A
1
A
0
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
O
8
O
9
High Impedance
H
X
X
X
X
X
X
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Disable
L
H
X
X
X
X
X
Outputs Equal P Input
L
X
L
X
X
X
X
Active HIGH
L
L
H
L
L
L
L
H
L
L
L
L
L
L
L
L
L
Output
L
L
H
L
L
L
H
L
H
L
L
L
L
L
L
L
L
(P
=
L)
L
L
H
L
L
H
L
L
L
H
L
L
L
L
L
L
L
L
L
H
L
L
H
H
L
L
L
H
L
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
H
L
H
L
L
L
L
L
H
L
L
L
L
L
L
H
L
H
H
L
L
L
L
L
L
L
H
L
L
L
L
L
H
L
H
H
H
L
L
L
L
L
L
L
H
L
L
L
L
H
H
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
H
L
L
H
L
L
L
L
L
L
L
L
L
H
L
L
H
H
X
H
X
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
Active LOW
L
L
H
L
L
L
L
L
H
H
H
H
H
H
H
H
H
Output
L
L
H
L
L
L
H
H
L
H
H
H
H
H
H
H
H
(P
=
H)
L
L
H
L
L
H
L
H
H
L
H
H
H
H
H
H
H
L
L
H
L
L
H
H
H
H
H
L
H
H
H
H
H
H
L
L
H
L
H
L
L
H
H
H
H
L
H
H
H
H
H
L
L
H
L
H
L
H
H
H
H
H
H
L
H
H
H
H
L
L
H
L
H
H
L
H
H
H
H
H
H
L
H
H
H
L
L
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
L
L
H
H
L
L
L
H
H
H
H
H
H
H
H
L
H
L
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
L
L
H
H
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
H
H
H
X
X
H
H
H
H
H
H
H
H
H
H
3
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7
4F537
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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4
74F537
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Storage Temperature
-
65
°
C to
+
150
°
C
Ambient Temperature under Bias
-
55
°
C to
+
125
°
C
Junction Temperature under Bias
-
55
°
C to
+
150
°
C
V
CC
Pin Potential to Ground Pin
-
0.5V to
+
7.0V
Input Voltage (Note 2)
-
0.5V to
+
7.0V
Input Current (Note 2)
-
30 mA to
+
5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
-
0.5V to V
CC
3-STATE Output
-
0.5V to
+
5.5V
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
Free Air Ambient Temperature
0
°
C to
+
70
°
C
Supply Voltage
+
4.5V to
+
5.5V
Symbol
Parameter
Min
Typ
Max
Units
V
CC
Conditions
V
IH
Input HIGH Voltage
2.0
V
Recognized as a HIGH Signal
V
IL
Input LOW Voltage
0.8
V
Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
-
1.2
V
Min
I
IN
=
-
18 mA
V
OH
Output HIGH
10% V
CC
2.5
V
Min
I
OH
=
-
1 mA
Voltage
10% V
CC
2.4
I
OH
=
-
3 mA
5% V
CC
2.7
I
OH
=
-
1 mA
5% V
CC
2.7
I
OH
=
-
3 mA
V
OL
Output LOW Voltage
10% V
CC
0.5
V
Min
I
OL
=
24 mA
I
IH
Input HIGH Current
5.0
µ
A
Max
V
IN
=
2.7V
I
BVI
Input HIGH Current
7.0
µ
A
Max
V
IN
=
7.0V
Breakdown Test
I
CEX
Output HIGH
50
µ
A
Max
V
OUT
=
V
CC
Leakage Current
V
ID
Input Leakage
4.75
V
0.0
I
ID
=
1.9
µ
A
Test
All Other Pins Grounded
I
OD
Output Leakage
3.75
µ
A
0.0
V
IOD
=
150 mV
Circuit Current
All Other Pins Grounded
I
IL
Input LOW Current
-
0.6
mA
Max
V
IN
=
0.5V
I
OZH
Output Leakage Current
50
µ
A
Max
V
OUT
=
2.7V
I
OZL
Output Leakage Current
-
50
µ
A
Max
V
OUT
=
0.5V
I
OS
Output Short-Circuit Current
-
60
-
150
mA
Max
V
OUT
=
0V
I
ZZ
Bus Drainage Test
500
µ
A
0.0V
V
OUT
=
5.25V
I
CCH
Power Supply Current
56
mA
Max
V
O
=
HIGH
I
CCZ
Power Supply Current
44
66
mA
Max
V
O
=
HIGH Z
5
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7
4F537
AC Electrical Characteristics
Symbol
Parameter
T
A
=
+
25
°
C
T
A
=
0
°
C to
+
70
°
C
Units
V
CC
=
+
5.0V
V
CC
=
+
5.0V
C
L
=
50 pF
C
L
=
50 pF
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
6.0
11.0
16.0
6.0
17.0
ns
t
PHL
A
n
to O
n
4.0
7.5
11.0
4.0
12.0
t
PLH
Propagation Delay
5.0
8.5
14.5
5.0
15.5
t
PHL
E
1
to O
n
4.0
6.5
9.0
4.0
10.0
t
PLH
Propagation Delay
6.0
11.0
16.0
6.0
17.0
ns
t
PHL
E
2
to O
n
5.0
10.0
14.0
5.0
15.0
t
PLH
Propagation Delay
6.0
11.5
18.0
6.0
20.0
t
PHL
P to O
n
6.0
11.0
16.0
6.0
17.0
t
PZH
Output Enable Time
3.0
5.5
10.5
3.0
11.5
ns
t
PZL
OE to O
n
5.0
9.0
13.0
5.0
14.0
t
PHZ
Output Disable Time
2.0
4.0
6.0
2.0
7.0
t
PLZ
OE to O
n
3.0
5.0
7.0
3.0
8.0
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6
74F537
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
7
www.fairchildsemi.com
7
4F537 1-of
-10 Decoder

wit
h
3-ST
A
T
E
Out
puts
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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