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Part Number 74AC139

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© 1999 Fairchild Semiconductor Corporation
DS009926
www.fairchildsemi.com
November 1988
Revised November 1999
7
4
AC
1
39
· 74ACT139 Dual 1-of
-4

Decoder
/
Demul
t
i
p
lexer
74AC139 · 74ACT139
Dual 1-of-4 Decoder/Demultiplexer
General Description
The AC/ACT139 is a high-speed, dual 1-of-4 decoder/
demultiplexer. The device has two independent decoders,
each accepting two inputs and providing four mutually-
exclusive active-LOW outputs. Each decoder has an
active-LOW Enable input which can be used as a data
input for a 4-output demultiplexer. Each half of the AC/
ACT139 can be used as a function generator providing all
four minterms of two variables.
Features
s
I
CC
reduced by 50%
s
Multifunction capability
s
Two completely independent 1-of-4 decoders
s
Active LOW mutually exclusive outputs
s
Outputs source/sink 24 mA
s
ACT139 has TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Connection Diagram
Pin Descriptions
FACT
is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package Number
Package Description
74AC139SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body
74AC139SJ
M16D
16-Lead Small Outline Package (SOIC), EIAJ Type II, 5.3mm Wide
74AC139MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC139PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74ACT139SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body
74ACT139SJ
M16D
16-Lead Small Outline Package (SOIC), EIAJ Type II, 5.3mm Wide
74ACT139MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT139PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pin Names
Description
A
0
, A
1
Address Inputs
E
Enable Inputs
O
0
­O
3
Outputs
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2
74AC139
·
74ACT139
Logic Symbols
IEEE/IEC
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Functional Description
The AC/ACT139 is a high-speed dual 1-of-4 decoder/
demultiplexer. The device has two independent decoders,
each of which accepts two binary weighted inputs (A
0
­A
1
)
and provides four mutually exclusive active-LOW outputs
(O
0
­O
3
). Each decoder has an active-LOW enable (E).
When E is HIGH all outputs are forced HIGH. The enable
can be used as the data input for a 4-output demultiplexer
application. Each half of the AC/ACT139 generates all four
minterms of two variables. These four minterms are useful
in some applications, replacing multiple gate functions as
shown in Figure 1, and thereby reducing the number of
packages required in a logic network.
FIGURE 1. Gate Functions (Each Half)
Logic Diagram
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
Inputs
Outputs
E
A
0
A
1
O
0
O
1
O
2
O
3
H
X
X
H
H
H
H
L
L
L
L
H
H
H
L
H
L
H
L
H
H
L
L
H
H
H
L
H
L
H
H
H
H
H
L
3
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74
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·
74ACT139
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT
circuits outside databook specifications.
DC Electrical Characteristics for AC
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
Supply Voltage (V
CC
)
-
0.5V to
+
7.0V
DC Input Diode Current (I
IK
)
V
I
=
-
0.5V
-
20 mA
V
I
=
V
CC
+
0.5V
+
20 mA
DC Input Voltage (V
I
)
-
0.5V to V
CC
+
0.5V
DC Output Diode Current (I
OK
)
V
O
=
-
0.5V
-
20 mA
V
O
=
V
CC
+
0.5V
+
20 mA
DC Output Voltage (V
O
)
-
0.5V to V
CC
+
0.5V
DC Output Source
or Sink Current (I
O
)
±
50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
±
50 mA
Storage Temperature (T
STG
)
-
65
°
C to
+
150
°
C
Junction Temperature (T
J
)
PDIP
140
°
C
Supply Voltage (V
CC
)
AC
2.0V to 6.0V
ACT
4.5V to 5.5V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
-
40
°
C to
+
85
°
C
Minimum Input Edge Rate (
V/
t)
AC Devices
V
IN
from 30% to 70% of V
CC
V
CC
@ 3.3V, 4.5V, 5.5V
125 mV/ns
Minimum Input Edge Rate (
V/
t)
ACT Devices
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
125 mV/ns
Symbol
Parameter
V
CC
T
A
=
+
25
°
C
T
A
=
-
40
°
C to
+
85
°
C
Units
Conditions
(V)
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
3.0
1.5
2.1
2.1
V
OUT
=
0.1V
Input Voltage
4.5
2.25
3.15
3.15
V
or V
CC
-
0.1V
5.5
2.75
3.85
3.85
V
IL
Maximum LOW Level
3.0
1.5
0.9
0.9
V
OUT
=
0.1V
Input Voltage
4.5
2.25
1.35
1.35
V
or V
CC
-
0.1V
5.5
2.75
1.65
1.65
V
OH
Minimum HIGH Level
3.0
2.99
2.9
2.9
Output Voltage
4.5
4.49
4.4
4.4
V
I
OUT
=
-
50
µ
A
5.5
5.49
5.4
5.4
V
IN
=
V
IL
or V
IH
3.0
2.56
2.46
I
OH
=
-
12 mA
4.5
3.86
3.76
V
I
OH
=
-
24 mA
5.5
4.86
4.76
I
OH
=
-
24 mA (Note 2)
V
OL
Maximum LOW Level
3.0
0.002
0.1
0.1
Output Voltage
4.5
0.001
0.1
0.1
V
I
OUT
=
50
µ
A
5.5
0.001
0.1
0.1
V
IN
=
V
IL
or V
IH
3.0
0.36
0.44
I
OL
=
12 mA
4.5
0.36
0.44
V
I
OL
=
24 mA
5.5
0.36
0.44
I
OL
=
24 mA (Note 2)
I
IN
(Note 4)
Maximum Input
Leakage Current
5.5
±
0.1
±
1.0
µ
A
V
I
=
V
CC
, GND
I
OLD
Minimum Dynamic
5.5
75
mA
V
OLD
=
1.65V Max
I
OHD
Output Current (Note 3)
5.5
-
75
mA
V
OHD
=
3.85V Min
I
CC
(Note 4)
Maximum Quiescent
Supply Current
5.5
4.0
40.0
µ
A
V
IN
=
V
CC
or GND
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4
74AC139
·
74ACT139
DC Electrical Characteristics for ACT
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
Note 7: Voltage Range 3.3 is 3.3V
±
0.3V.
Voltage Range 5.0 is 5.0V
±
0.5V
Symbol
Parameter
V
CC
T
A
=
+
25
°
C
T
A
=
-
40
°
C to
+
85
°
C
Units
Conditions
(V)
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
4.5
1.5
2.0
2.0
V
V
OUT
=
0.1V
Input Voltage
5.5
1.5
2.0
2.0
or V
CC
-
0.1V
V
IL
Maximum LOW Level
4.5
1.5
0.8
0.8
V
V
OUT
=
0.1V
Input Voltage
5.5
1.5
0.8
0.8
or V
CC
-
0.1V
V
OH
Minimum HIGH Level
4.5
4.49
4.4
4.4
V
I
OUT
=
-
50
µ
A
Output Voltage
5.5
5.49
5.4
5.4
V
IN
=
V
IL
or V
IH
4.5
3.86
3.76
V
I
OH
=
-
24 mA
5.5
4.86
4.76
I
OH
=
-
24 mA (Note 5)
V
OL
Maximum LOW Level
4.5
0.001
0.1
0.1
V
I
OUT
=
50
µ
A
Output Voltage
5.5
0.001
0.1
0.1
V
IN
=
V
IL
or V
IH
4.5
0.36
0.44
V
I
OL
=
24 mA
5.5
0.36
0.44
I
OL
=
24 mA (Note 5)
I
IN
Maximum Input
5.5
±
0.1
±
1.0
µ
A
V
I
=
V
CC
, GND
Leakage Current
I
CCT
Maximum
5.5
0.6
1.5
mA
V
I
=
V
CC
-
2.1V
I
CC
/Input
I
OLD
Minimum Dynamic
5.5
75
mA
V
OLD
=
1.65V Max
I
OHD
Output Current (Note 6)
5.5
-
75
mA
V
OHD
=
3.85V Min
I
CC
Maximum Quiescent
5.5
4.0
40.0
µ
A
V
IN
=
V
CC
Supply Current
or GND
V
CC
T
A
=
+
25
°
C
T
A
=
-
40
°
C to
+
85
°
C
Symbol
Parameter
(V)
C
L
=
50 pF
C
L
=
50 pF
Units
(Note 7)
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
3.3
4.0
8.0
11.5
3.5
13.0
ns
A
n
to O
n
5.0
3.0
6.5
8.5
2.5
9.5
t
PHL
Propagation Delay
3.3
3.0
7.0
10.0
2.5
11.0
ns
A
n
to O
n
5.0
2.5
5.5
7.5
2.0
8.5
t
PLH
Propagation Delay
3.3
4.5
9.5
12.0
3.5
13.0
ns
E
n
to O
n
5.0
3.5
7.0
8.5
3.0
10.0
t
PHL
Propagation Delay
3.3
4.0
8.0
10.0
3.0
11.0
ns
E
n
to O
n
5.0
2.5
6.0
7.5
2.5
8.5
5
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74
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·
74ACT139
AC Electrical Characteristics for ACT
Note 8: Voltage Range 5.0 is 5.0V
±
0.5V
Capacitance
V
CC
T
A
=
+
25
°
C
T
A
=
-
40
°
C to
+
85
°
C
Symbol
Parameter
(V)
C
L
=
50 pF
C
L
=
50 pF
Units
(Note 8)
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
5.0
1.5
6.0
8.5
1.5
9.5
ns
A
n
to O
n
t
PHL
Propagation Delay
5.0
1.5
6.0
9.5
1.5
10.5
ns
A
n
to O
n
t
PLH
Propagation Delay
5.0
2.5
7.0
10.0
2.0
11.0
ns
E
n
to O
n
t
PHL
Propagation Delay
5.0
2.0
7.0
9.5
1.5
10.5
ns
E
n
to O
n
Symbol
Parameter
Typ
Units
Conditions
C
IN
Input Capacitance
4.5
pF
V
CC
=
OPEN
C
PD
Power Dissipation Capacitance
40.0
pF
V
CC
=
5.0V
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6
74AC139
·
74ACT139
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body
Package Number M16A
7
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74
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·
74ACT139
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide
Package Number M16D
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8
74AC139
·
74ACT139
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
9
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74
A
C
13
9

·
74ACT139 Dual 1-of
-4

Decoder
/
Demul
t
i
p
lexer
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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