This specification are subject to be changed without notice.

11.1.2001

EM73P362

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

GENERAL DESCRIPTION

EM73P362 is an advanced single chip CMOS 4-bit one-time-programmable (OTP) micro-controller. It contains
3K-byte ROM, 52-nibble RAM, 4-bit ALU, 13-level subroutine nesting, 22-stage time base, one 12-bit timer for
the kernal function and one high speed counter. EM73P362 also contains 5 interrupt sources, 1 input port, 4
bidirection ports, built-in watch-dog-timer and LCD driver (27x3 to 15x3).
Except low-power consumption and high speed, EM73P362 has the STOP mode and IDLE mode operation for
power saving function.

FEATURES

ˇ Operation voltage

: 1.3V to 1.8V. (clock frequency : 32K Hz)

ˇ Clock source

: Single clock system for crystal, connect a external resistor or external clock

source, available by mask option.

ˇ Instruction set

: 109 powerful instructions.

ˇ Instruction cycle time

: Up to 122ľs for 32 K Hz.

ˇ ROM capacity

: 3072 x 8 bits.

ˇ RAM capacity

: 52 x 4 bits.

ˇ Input port

: 1 port (4-bit).

ˇ Bidirection port

: 4 ports (P4, P6, P7, P8) are available by mask option. P4 is a high current port.

(P4.0 and TONE available by mask option. P4.1~P4.3 are shared with the input/
output of RFO.) P6, P7 and P8 are shared with SEG15-SEG26.

ˇ 12-bit timer

: One 12-bit timer is programmable for timer.

ˇ High speed counter

: The high speed counter includes one 8-bit high speed counter, one 12-bit general

counter and a resistor frequency oscillator. It has resistor to frequency oscillation
mode, melody mode and auto load timer mode.

ˇ Built-in time base counter: 22 stages.
ˇ Subrountine nesting

: Up to 13 levels.

ˇ Interrupt

: External interrupt . . . . . . 2 input interrupt sources.

Internal interrupt . . . . . . 2 timer overflow interrupts,

1 time base interrupt.

ˇ LCD driver

: 27x3 to 15x3 dots available by mask option. 1/3, 1/2 and static three kinds of duty

(1/2 bias) selectable. The programming method of LCD driver is RAM mapping.

ˇ Built-in watch-dog-timer is available by mask option.
ˇ Built-in low battery detector.
ˇ Power saving function

: STOP mode and IDLE mode.

ˇ Package type

: Chip form 50 pins.

QFP 52 pins (CQ).
QFP 100 pins (BQ).

This specification are subject to be changed without notice.

11.1.2001

EM73P362

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

PIN ASSIGNMENT

Remark : In ( ) pin used for OTP programming.

50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31

81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99

100

NC
NC
NC
NC

SEG14
SEG13
SEG12
SEG11
SEG10

SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3

NC
NC
NC
NC

SEG2

SEG1

SEG0

COM1

COM0

VEE

(GND)GND

LXIN

LXOUT

(VDD)VDD

VEE2

BAT

NC
NC
NC
NC
NC
VPP(VPP)
P4.3
P4.2(DOUT)
P4.1(DIN)
P4.0
SOUND
P0.3(DCLK)
P0.2(OEB)
P0.1(PGMB)
P0.0(ACLK)
RESET(RESET)
NC
NC
NC
NC

P8.0

P8.1

P8.2

P8.3

P7.0

P7.1

P7.2

P7.3

P6.0

P6.1

P6.2

P6.3

COM2

EM73P362BQ

QFP 100

33
32
31
30
29
28
27

39
38
37

1
2
3
4
5
6
7
8
9
10
11

COM1
COM0

VEE

(VSS)VSS

XIN

XOUT

(VDD)VDD

VEE2

BAT

COM2

TONE

(VPP)VPP

P8.2
P8.3
P7.0
P7.1
P7.2
P7.3
P6.0

SEG11
SEG12

SEG13

SEG14

SEG3

SEG4

SEG5

SEG6

SEG7

SEG8

SEG9

SEG10

SEG0

EM73P362CQ

QFP 52

P6.3

(PGMB)P0.1

(OEB)P0.2

(DCLK)P0.3

P4.0

(DIN)P4.1

(DOUT)P4.2

P4.3

12
13

(RESET)RESET

(ACLK)P0.0

SEG1

P8.0

P8.1

P6.2

P6.1

SEG2

This specification are subject to be changed without notice.

11.1.2001

EM73P362

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

FUNCTION BLOCK DIAGRAM

Interrupt

Control

Time

Base

12-bit

timer

(TA)

System Control

Instruction Decoder

Instruction Register

ROM

Data Bus

Reset

Control

Frequency

doubler

Timing

Generator

Sleep Mode

Control

Data pointer

ACC

ALU

Flag

Z C S

Stack pointer

Stack

RAM

I/O Control

P0.0(INT1)/WAKEUP0
P0.1/WAKEUP1
P0.2(INT0)/WAKEUP2
P0.3/WAKEUP3

RESET

Clock

Generator

XIN XOUT

LCD

driver

Tone generator

High speed counter

VA
VB
VEE
COM0~COM2
SEG0~SEG14

P4.0(RX)/TONE
P4.1(CS)

TONE

P6,P7,P8/SEG(26..15)

WDT

P4.2(RY)
P4.3(RZ)

Low battery detector

BAT

PIN DESCRIPTIONS

Pin name

Function

type

VDD

Power supply (+), Power supply (+) for programming OTP

VSS

Power supply (-), Power supply (-) for programming OTP

RESET

System reset input signal, low active

RESET_A

mask option : none

pull-up

XIN

Crystal / external resistor or external clock source

OSC_A / OSC_F

connecting pin

XOUT

Crystal / external resistor connecting pin

OSC_A / OSC_F

P0.0(INT1)/WAKEUP0,

2-bit input pins with external interrupt sources input

INPUT_J

P0.2(INT0)/WAKEUP2

and STOP/IDLE releasing function
mask option : wake-up enable, pull-up

wakeup enable, none
wakeup disable, pull-up
wakeup disable, pull-down
wakeup disable, none

In programming OTP mode:
P0.0/ACLK : address counter clock for programming OTP
P0.2/OEB : data output enable for programming OTP

This specification are subject to be changed without notice.

11.1.2001

EM73P362

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

PIN DESCRIPTIONS

Pin name

Function

type

P0(1,3)/WAKEUP1,3

2-bit input pins with STOP / IDLE releasing function

INPUT_H

mask option : wakeup enable, pull-up

wakeup enable, none
wakeup disable, pull-up
wakeup disable, pull-down
wakeup disable, none

In programming OTP mode :
P0.1/PGMB : program data to OTP cells for programming OTP
P0.3/DCLK : data in/out clock signal for programming OTP

P4.0(RX)/TONE

1-bit bidirection I/O pin or inverse sound effect output or

I/O_O

RF oscillation
mask option : TONE enable, push-pull, high current PMOS

TONE disable, open-drain(apply to RF oscillation)
TONE disable, push-pull, high current PMOS
TONE disable, push-pull, low current PMOS

P4.1(CS)

1-bit bidirection I/O pin or RF oscillation bias pin

I/O_X

mask option : open-drain(apply to RF oscillation)

push-pull, high current PMOS
push-pull, low current PMOS

In programming OTP mode :
P4.1/DIN : data input for programming OTP

P4.2(RY)

1-bit bidirection I/O pins or RF oscillation input pins

I/O_Y

mask option : open-drain(apply to RF oscillation)

push-pull, high current PMOS
push-pull, low current PMOS

In programming OTP mode :
P4.2/DOUT : data output for programming OTP

P4.3(RZ)

1-bit bidirection I/O pins or RF oscillation input pins

I/O_Y

mask option : open-drain(apply to RF oscillation)

push-pull, high current PMOS
push-pull, low current PMOS

P6(0..3)/SEG(23..26),

12-bit bidirection I/O pins are shared with LCD segment pin

I/O_O

P7(0..3)/SEG(19..22),

mask option : segment enable, open-drain

P8(0..3)/SEG(15..18)

segment disable, open-drain
segment disable, push-pull, high current PMOS
segment disable, push-pull, low current PMOS

BAT

Connect the capacitor for built-in low battery detector

TONE

Built-in tone generator output

VA, VB, VEE

Connect the capacitors for LCD bias voltage

VEE2

Used for LCD bias voltage
Connect to VDD

COM0 ~ COM2

LCD common output pins

SEG0 ~ SEG14

LCD segment output pins

VPP

In normal mode : No connection (Floating)
In programming OTP mode :
VPP : high voltage (12V) power source for programming OTP

This specification are subject to be changed without notice.

11.1.2001

EM73P362

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

LDAX

Acc

ROM[DP]

LDAXI

Acc

ROM[DP]

,DP+1

DP is a 12-bit data register which can store the program ROM address to be the pointer for the ROM code data.
First, user load ROM address into DP by instruction "STADPL, STADPM, STADPH", then user can get the
lower nibble of ROM code data by instruction "LDAX" and higher nibble by instruction "LDAXI".

User's program and fixed data are stored in the program ROM. User's program is according the PC value
to send next executed instruction code. Fixed data can be read out by table-look-up instruction.
Table-look-up instruction is depended on the Data Pointer (DP) to indicate to ROM address, then to get the
ROM code data.

FUNCTION DESCRIPTIONS

PROGRAM ROM ( 3K X 8 bits )

3 K x 8 bits program ROM contains user's program and some fixed data.

The basic structure of program ROM can be divided into 4 parts.
1. Address 000h: Reset start address.
2. Address 002h - 00Ch : 5 kinds of interrupt service routine entry addresses.
3. Address 00Eh-086h : SCALL subroutine entry address, only available at 00Eh,016h,01Eh,026h, 02Eh,

036h, 03Eh, 046h, 04Eh, 056h, 05Eh, 066h, 06Eh, 076h, 07Eh, 086h.

4. Address 000h - 7FFh : LCALL subroutine entry address.
5. Address 000h - BFFh : Except used as above function, the other region can be used as user's program region.

address 3072 x 8 bits
000h

Reset start address

002h

INT0; External interrupt service toutine entry address

004h
006h

TRGA; Timer/counter A interrupt service routine entry address

008h

TRGB; Timer/counter B interrupt service routine entry address

00Ah

TBI; Time base interrupt service routine entry address

00Ch

INT1; External interrupt service routine entry address

00Eh
086h

BFFh

SCALL, subroutine call entry address

Part Number EM73P362