* This specification are subject to be changed without notice.

EM73880

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

11.30.2001

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GENERAL DESCRIPTION

EM73880 is an advanced single chip CMOS 4-bit micro-controller. It contains 8K-byte ROM, 244-nibble RAM,
4-bit ALU, 13-level subroutine nesting, 22-stage time base, two 12-bit timer/counters for the kernel function.
EM73880 also contains 6 interrupt sources, 1 input port, 2 bidirection ports, LCD display (32x4), and one high
speed timer/counter,sound generator, and speech synthesizer.
EM73880 has plentiful operating modes (SLOW, IDLE, STOP) intended to reduce the power consumption.

FEATURES

ˇ Operation voltage

: 2.4V to 3.6V.

ˇ Clock source

: Dual clock system. Low-frequency oscillator (32.768 KHz) could be Crystal or RC

oscillator high-frequency oscillator is a built-in for 4.6 MHz.

ˇ Instruction set

: 107 powerful instructions.

ˇ Instruction cycle time : 1.7us for 4.6 MHz (high speed clock).

244 ľs for 32768 Hz (low speed clock).

ˇ ROM capacity

: 8192 X 8 bits.

ˇ RAM capacity

: 244 X 4 bits.

ˇ Input port

: 1 port (P0). P0(0..3) and IDLE releasing function are available by mask option.

ˇ Bidirection port

: 2 ports (P4, P8). P4.1 is shared with HTC external input. P8(0..3) and IDLE releasing

function are available by mask option.

ˇ 12-bit timer/counter

: Two 12-bit timer/counters are programmable for timer, event counter and pulse width

measurement.

ˇ High speed timer/counter : One 8-bit high speed timer/counters is programmable for auto load timer, melody

output and pulse width measurement.

ˇ Speech synthesizer : 160K Speech ROM.

ˇ Built-in time base counter : 22 stages.
ˇ Subroutine nesting

: Up to 13 levels.

ˇ Interrupt

: External . . . . . 1 input interrupt sources.

Internal . . . . . . 2 Timer overflow interrupts, 1 time base interrupt.

1 high speed timer/counter overflow interrupt.
1 Speech ending interrupt.

ˇ LCD driver

: 32 X 4 dots, 1/4,1/3,1/2, static 4 kinds of duty Type selectable, 1/2 bias, 1/3 bias, 2 kinds

bias Type selectable.

ˇ Power saving function : SLOW, IDLE, STOP operation mode.
ˇ Package type

: Chip form. . . . .63 pins.

APPLICATIONS

EM73880 is suitable for application in family applicance, consumer products, hand held games and the toy
controller.

* This specification are subject to be changed without notice.

EM73880

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

11.30.2001

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FUNCTION BLOCK DIAGRAM

Symbol

Pin-type

Function

DD,

DD2

Power supply (+) / speech synthesizer power supply(+)

Power supply (-)

RESET

RESET-A

System reset input signal, low active
mask option :

none
pull-up

CLK

OSC-G

Capacitor connecting pin for internal high frequency OSC.

LXIN

OSC-B/OSC-H Crstal/RC connecting pin for low speed clock source

LXOUT

OSC-B

Crstal/RC connecting pin for low speed clock source

P0(0..3)/WAKEUP0..3

INPUT-K

4-bit input port with IDLE releasing function
mask option :

wakeup enable, negative edge release, pull-up
wakeup enable, negative edge release, none
wakeup enable, positive edge release, pull-down
wakeup enable, positive edge release, none
wakeup disable, pull-up
wakeup disable, pull-down
wakeup disable, none

P4.0

I/O-R

1-bit bidirection I/O port

PIN DESCRIPTIONS

Interrupt

Control

Time

Base

Timer/Counter

(TA,TB)

System Control

Instruction Decoder

Instruction Register

ROM

Data Bus

Reset

Control

Int. Clock
Generator

Clock

Generator

(slow)

Timing

Generator

Clock Mode

Control

Data pointer

ACC

ALU

Flag

Stack pointer

Stack

RAM

I/O Control

P0.0/WAKEUP0
P0.1/WAKEUP1
P0.2/WAKEUP2
P0.3/WAKEUP3

P4.1/TRGH

P4.2

P4.3

P8.0/WAKEUPA

P8.1(TRGB)/WAKEUPB

P8.2(INT0)/WAKEUPC

P8.3(TRGA)/WAKEUPD

RESET

LXIN

LXOUT

HTC

LCD

VA
VB

COM0~COM3

SEG0~SEG31

CLK

Speech Synthesizer

PWM

BZ1

BZ2

P4.0

* This specification are subject to be changed without notice.

EM73880

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

11.30.2001

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Symbol

Pin-type

Function

P4.1/TRGH

I/O-Q

1-bit bidirection I/O port with HTC external input
mask option :

NMOS open-drain
PMOS open-drain
low current push-pull
normal current push-pull
high current push-pull

P4(2,3)

I/O-Q

2-bit bidirection I/O port with high current source
mask option :

NMOS open-drain
PMOS open-drain
low current push-pull
normal current push-pull
high current push-pull

P8.0/WAKEUPA,

I/O-S

2-bit bidirection I/O port with external interrupt source input only

P8.2/INT0/WAKEUPC

P8.2 and IDLE releasing function
mask option :

wakeup enable, low current push-pull
wakeup enable, normal current push-pull
wakeup disable, open-drain
wakeup disable, low current push-pull
wakeup disable, normal current push-pull

P8.1(TRGB)/WAKEUPB I/O-S

2-bit bidirection I/O port with time/counter A,B external input and IDLE

P8.3(TRGA)/WAKEUPD

releasing function
mask option :

wakeup enable, low current push-pull
wakeup enable, normal current push-pull
wakeup disable, open-drain
wakeup disable, low current push-pull
wakeup disable, normal current push-pull

BZ1, BZ2

Speech output pin

VA,VB, V1, V2, V3

Connect the capacitors for LCD bias voltage

COM0~COM3

LCD common output pins

SEG0~SEG31

LCD segment output pins

TEST

Tie Vss as package type, no connecting as COB type

PIN DESCRIPTIONS

FUNCTION DESCRIPTIONS

PROGRAM ROM (8K X 8 bits)

8 K x 8 bits program ROM contains user's program and some fixed data.
The basic structure of program ROM can be divided into 6 parts.
1. Address 000h: Reset start address.
2. Address 002h - 00Ch : 6 kinds of interrupt service routine entry addresses.
3. Address 00Eh-086h :

SCALL subroutine entry address, only available at 00Eh,016h,01Eh,026h, 02Eh,
036h, 03Eh, 046h, 04Eh, 056h, 05Eh, 066h, 06Eh, 076h, 07Eh, 086h.

4. Address 000h - 7FFh : LCALL subroutine entry address
5. Address 000h - 1FFFh : Except used as above function, the other region can be used as user's program region.
6. Address 1000h - 1FFFh : Fixed data stortage area.

* This specification are subject to be changed without notice.

EM73880

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

11.30.2001

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address 8192 x 8 bits
000h

Reset start address

002h

INT0; External interrupt service routine entry address

004h

HTCI; High speed timer interrupt service entry address

006h

TRGA; Timer/counterA interrupt service routine entry address LCALL entry

008h

TRGB; Timer/counter B interrupt service routine entry address address

00Ah

TBI; Time base interrupt service routine entry address

00Ch

SPI

00Eh
086h
800h

FFFh

fixed data area

Bank1

1FFF

User's program and fixed data are stored in the program ROM. User's program is according the PC value
to send next executed instruction code . Fixed data can be read out.
The program counter is a 13-bit binary counter. The PC can defined 8K ROM.

Table -look-up instruction is depended on the Data Pointer (DP) to indicate to ROM address, then to get the
ROM code data. The fixed data only can be put in bank1.

LDAX

Acc

ROM[DP]

LDAXI

Acc

ROM[DP]

,DP+1

DP is a 12-bit data register which can store the program ROM address to be the pointer for the ROM code

1000

SCALL, subroutine call entry address

data. First, user load ROM address into DP by instruction "STADPL, STADPM, STADPH", then user can
get the lower nibble of ROM code data by instruction "LDAX" and higher nibble by instruction "LDAXI"

PROGRAM EXAMPLE: Read out the ROM code of address 1777h by table-look-up instruction.

LDIA #07h;
STADPL ; DP2-0

07h

STADPM ; DP5-3

07h

STADPH

; DP8-6

07h, Load DP=777h

:
LDL #00h;
LDH #03h;
LDAX

; ACC

STAMI

; RAM[30]

LDAXI

; ACC

STAM

; RAM[31]

;
ORG 1777H
DATA 56H;
:

DATA RAM ( 244-nibble )

There is total 244 - nibble data RAM from address 00 to F3h
Data RAM includes 3 parts: zero page region, stacks and data area.

* This specification are subject to be changed without notice.

EM73880

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

11.30.2001

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LCD display RAM:

RAM address from 20h ~ 3Fh are the LCD display RAM area, the RAM data of this region can't be operated
by instruction LDHL xx and EXHL.

ZERO- PAGE:

From 00h to 0Fh is the location of zero-page . It is used as the pointer in zero -page addressing mode for the
instruction of "STD #k,y; ADD #k,y; CLR y,b; CMP k,y".

PROGRAM EXAMPLE: To wirte immediate data "07h" to address "03h" of RAM and to clear bit 2 of RAM.

STD #07h, 03h ; RAM[03]

07h

CLR 0Eh,2 ; RAM[0Eh]

STACK:

There are 13 - level (maximum) stack for user using for subroutine (including interrupt and CALL). User
can assign any level be the starting stack by giving the level number to stack pointer (SP).
When user using any instruction of CALL or subroutine, before entry the subroutine, the previous PC address
will be saved into stack until return from those subroutines ,the PC value will be restored by the data saved
in stack.

DATA AREA:

Except the special area used by user, the whole RAM can be used as data area for storing and loading general
data.

ADDRESSING MODE

(1) Indirect addressing mode:

Indirect addressing mode indicates the RAM address by specified HL register.
For example:

LDAM ; Acc

RAM[HL]

STAM ; RAM[HL]

Acc

(2) Direct addressing mode:

Direct addressing mode indicates the RAM address by immediate data.

level 0

level 4

level 8

level C

level 1

level 5

level 9

level 2

level 6

level A

level 3

level 7

level B

B0h ~ BFh

C0h ~ CFh

D0h ~ DFh

E0h ~ EFh

F0h ~ F3h

Address

00h~0Fh

10h~1Fh

20h~2Fh

30h~3Fh

40h~4Fh

zero page

LCD display RAM

Increment

Part Number EM73880