ELAN MICROELECTRONICS CORP.
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1
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ALL RIGHTS STRICTLY RESERVED, ANY PORTION IN THIS PAPER SHALL NOT BE REPRODUCED, COPIED WITHOUT PERMISSION.
1.2 /2001/7/16
240 Channel Common Driver for Dot matrix STN Liquid
Crystal Display with High Voltage Drive
EM65H137
Contents
1. General description
2
2. Feature
2
3. Applications
2
4. Pin configurations (package)
3
5. Functional block diagram
3
6. Pin descriptions
4
7. Function description
7
8. Absolute maximum rating
10
9. DC electrical characteristics
11
10. AC electrical characteristics
12
11. Timing diagrams
13
12. Application circuit
14
ELAN MICROELECTRONICS CORP.
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1.2 /2001/7/16
General description
The EM65H137 is a 240-channel common driver which drives a dot matrix STN liquid crystal panel.
By changing the mode, this can be applied to 240- and 200- and 160- channel output. Through the
use of a 43V high-voltage CMOS process technology, a high-voltage drive of +21.5 V and -21.5 V,
centering on VM is possible. -21.5V is generated from max +21.5V with built-in switching circuit and
external capacity. 3 V is used for logic drive. This device is used together with the segment driver
EM65H130 or EM65H134.
Feature
· Display duty: Up to 1 / 240
· LCD drive voltage: 43 V max
· Built-in 240 bits bi-directional shift register
· Built-in switching circuit (to generate -21.5V)
· Number of LCD drive circuit: 240
· Operating voltage: 2.5 to 5.5 V
· Intermediate voltage I/F
· Built-in alternating signal generation circuit
· Pin programmable, Output mode change: 240-output mode 200-output mode 160-output mode
·Built-in display-off function: when /DSPOF is "L", all LCD drive output remain at the VM level.
· Flex TCP
Applications
· PDA
· Dictionary
· Message display product
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1.2 /2001/7/16
Pin configurations (package)
V
L
CDL
VH
L
VM
L
VL
L
VE
EL
VE
O
C1
C2
EI
O
2
FR
RS
T
FR
S
4
FR
S
3
FR
S
2
FR
S
1
FR
S
0
VD
D
M1
M0
/D
O
C
DS
POF
AM
P
DI
R
VS
S
LP
CL
P
M/
S
EI
O
1
VE
ER
VL
R
VM
R
VH
R
V
L
CDR
C1
C2
.
.
.
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.
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C2
3
9
C2
4
0
Top view
EM65H137 TCP Package
273 ----------------------------------------------------------------------------------------------241
1---------------------------------------------------------------------------------------------------------------------240
Figure1. TCP package pin arrangement
Functional block diagram
L iq u id c rys ta l d is p la y d rive r circ u it
2 40 -b its b id irec tio na l s h ift re g is te r
L eve l
S h ifte r
3
3
2 40
C 1 to C 2 4 0
V H R ,V M R ,V L R
F R
/D S P O F
2 40 b its leve l s hifter
2 40
V H L ,V M L ,V L L
A lte rn a tin g s ign a l
g en e ra ting c irc uit
/R S T
F R S 0 ~ F R S 4
c lo c k c o ntro l & da ta d irec tio n c on trol
s w itc h c irc u it
C L P
A M P
V E O
C 1 ,C 2
E
I
O
2
E
I
O
1
D
I
R
M
1
D
M
S
M
0
L
P
V
L
CD
R,
L
VE
ER
,
L
V
D
D
V
S
S
/
D
O
C
Figure 2. System block diagram
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1.2 /2001/7/16
Pin descriptions
Table 1. Pin arrangement
Pin NO.
Symbol
I/O
Description
1 to 240
C1C240
O
LCD driver output
241,273 VLCDR,
VLCDL -
242,272 VHR,
VHL -
243,271 VMR,
VML -
244,270 VLR,
VLL -
245,269 VEER,
VEEL -
Power supply for LCD driver
246
265
EIO1
EIO2
I/O Serial data input / output pin
247 DMS
I
Controls the display-off function and display-off signal output from
/DOC pin.
248
CLP
I
Built-in switching circuit clock input.
249
LP
I
Shift clock input for segment mode
250 VSS
I
Ground
(0V)
251
DIR
I
Display data shift direction selection
252
SWC
I
Built-in switching circuit on-off control.
253
/DSPOF
I
Control input for deselect output level
254
/DOC
O
Display off control pin for segment driver.
256
255
M1
M0
I
Mode select for the number of LCD drive output pins.
257
VDD
I
Power supply for logic system
258~262 FRS0~FRS4
I
This pin specifies the cycle of the alternating signal, FR signal in the
unit of the number of lines(LP signal)
263
RST
I
Setting this pin to initializes the FR signal circuit
264
FR
I/O AC-converting signal input for LCD driver waveform
265 C2
-
Capacitance
266 C1
-
Capacitance
267
VEO
O
Voltage output of built-in switching circuit
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1.2 /2001/7/16
Table 2. Pin descriptions
Symbol
I/O Connect To
Description
VLCDL, R
VEEL, R
I
Power supply LCD driver output
VHL,R
VML,R
VLL,R
I Power
supply
Power supply for LCD driver level
Select level : VH,VL
Non-select level : VM
VDD
VSS
I
Power supply Power supply for internal logic system
VEO O
VEE
When using built-in switching circuit to generate VEE, VM voltage is
point of reference. VLCD - VM voltage is reversed and output as
VEE. If switching circuit not used, set this pin to open, don't connect
to any pin
C1
C2
- -
When using built-in switching circuit to generate VEE, should be
connected, or it don't connect.
LP I
Controller
Shift clock for bi-directional shift register, data is shifted on the
falling edge of the clock
FR I/O
Controller
or
Open
AC signal for LCD drive
The LCD driver output voltage level can be set by line latch output
signal and FR signal
It can be produced by internal function of FRS0~FRS4
FR S0
FR S1
FR S2
FR S3
FR S4
I VDD/VSS
This pin specifies the cycle of the alternating signal, FR signal in the
unit of the number of lines. The number of lines, which is an integer
from 2 to 31, is specified as follows. Usually, specify the number of
lines within a range from 10 to 31. When the EM65H137 is driven by
an external alternating signal, specify the number of lines as zero.
M0
M1
I VDD/VSS
Switch terminals for the number of LCD drive output pins.
M0 M1 Description(DIR="H")
H
H
240 output (C1-C240)
H
L
200 output (C21-C220)
L
H
160 output (C41-C200)
L L Prohibited
EIO1
EIO2
I Controller
Data input/output shift for bi-directional shift register
DIR EIO1
EIO2
H Output Input
L Input Output
CLP I
LP/VSS
When using built-in switching circuit and generating VEE, this pin
connect LP pin. If built-in switching circuit is not used, CLP must be
fixed to VSS.
/RST I
Controller
/RST Description
H Normal
status
L
Initializes the FR signal circuit
/DSPOF I
Controller
Control signal for output deselect level
When the signal is lowthe output (C1 C240) of LCD driver be
set to level VMthe internal register is not cleared
When the signal is high, returns to the normal status.
DMS I
VDD/VSS
Display-off function mode selection.
DMS Description
H
When /DSPOF is low level,
C1-C240 set VM level.
L
Until 16 times serial data is into EIO,
C1-C240 set VM level.
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