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042602

Note:

Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple

revisions of any device may be simultaneously available through various sales channels. For information about device
errata, click here:

http://dbserv.maxim-ic.com/errata.cfm

FEATURES

§ Fully compliant with Ultra3, Ultra160,

Ultra320, and Ultra2 (LVD only) SCSI

§ Provides low-voltage differential (LVD)

termination for nine signal line pairs

§ Zero-temperature coefficient-termination

resistors

§ Auto-select of LVD termination
§ 5% tolerance on LVD termination resistance
§ Low power-down capacitance of 3pF
§ Built-in mode change filter/delay
§ On-board thermal-shutdown circuitry
§ SCSI bus hot-plug compatible

APPLICATIONS

§ Raid Systems
§ SCSI Host Bus Adapter Cards (HBA)
§ Servers
§ SCSI Cables
§ Network Attached Storage (NAS)
§ Storage Area Networks (SANs)

ORDERING INFORMATION

DS2120E 28-Pin TSSOP 0°C to +70°C
DS2120B 36-Pin SSOP 0°C to +70°C

DESCRIPTION

The DS2120 Ultra3 LVD SCSI terminator is a low-voltage differential (LVD) terminator. If the device is
connected in an LVD-only bus, the DS2120 uses LVD termination. If any single-ended (SE) or high-
voltage differential (HVD) devices are connected to the bus, the DS2120 disconnects from the bus. This
is accomplished inside the part automatically by sensing the voltage on the SCSI bus DIFFSENS line.

For the LVD termination, the DS2120 integrates two current sources with nine precision resistor strings.
Three DS2120 terminators are needed for a wide SCSI bus.

R1P

R1N

VREF

R2N

HS GND

R3P

R3N

R4P

R4N

R2P

HS GND

R5P

R5N

ISO

GND

LVD

R9N

R8N

R8P

HS GND

R7N

R7P

R6N

R9P

TPWR

DIFF_CAP

DIFFSENSE

MSTR/SLV

R6P

DS2120B 36-Pin

SSOP

VREF

HS GND

R3P

R3N

R4P

R4N

R5P

R5N

ISO

GND

R1P

R1N

R2N

R2P

HS GND

R7N

R7P

R6N

TPWR

DIFF_CAP

DIFFSENSE

MSTR/SLV

R6P

R9N

R8N

R8P

R9P

TPWR

DS2120E 28-Pin TSSOP

DS2120

Ultra3 LVD SCSI Terminator

www.maxim-ic.com

PIN ASSIGNMENT

DS2120

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REFERENCE DOCUMENTS

Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface (SPI) Project: 0855-M, 1995
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 2 (SPI-2) Project: 1142-M, 1998
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 3 (SPI-3) Project: 1302-D, 1999
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 4 (SPI-4) Project: 1365-D, 200x

Available from:
American National Standards Institute (ANSI) Phone: 212-642-4900
Global Engineering Documents 15 Inverness Way East; Englewood, CO 80112 Phone: 800-854-7179

FUNCTIONAL DESCRIPTION

The DS2120 combines LVD termination with DIFFSENSE sourcing and detection.

LVD termination is provided by a laser-trimmed resistor biased with two current sources and a common-
mode voltage source, generated from a bandgap reference of 1.25V. The configuration is a y-type
terminator with a 105

differential and 150

common-mode resistance. A fail-safe bias of 112mV is

maintained when no drivers are connected to the SCSI bus. In non-LVD mode, the resistors are isolated
from the bus.

The DIFF_CAP pin of DS2120 monitors the DIFFSENS line to determine the proper operating mode of
the device. If the voltage on the DIFF_CAP is between 0.7V and 1.9V, the device enters LVD mode after
the mode-change delay. If the voltage at the DIFF_CAP later crosses one of the thresholds, the DS2120
again changes modes after the mode-change delay. The mode-change delay is the same when changing in
or out of LVD mode. A new mode change can start anytime after a previous mode change has been
detected. These modes are the following:

LVD Mode: LVD termination is provided by a precision laser-trimmed resistor string with two current
sources. This configuration yields a 105

differential and 150

common-mode impedance. A fail-safe

bias of 112mV is maintained when no drivers are connected to the SCSI bus.

SE Isolation Mode: The DS2120 identifies that there is a SE (single-ended) device on the SCSI bus and
isolates the termination pins from the bus.

HVD Isolation Mode: The DS2120 identifies that there is an HVD device on the SCSI bus and isolates
the termination pins from the bus.

When ISO is pulled high, the termination pins are isolated from the SCSI bus and VREF remains active.
The mode-change delay/filter is still active and the LVD pin continues to indicate the correct bus mode.
During thermal shutdown, the termination pins are isolated from the SCSI bus and VREF becomes high
impedance. The DIFFSENS driver is shut down during either of these two events. The DIFF_CAP
receiver is disabled and the LVD goes low, indicating a non-LVD condition.

To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As
with all analog circuitry, the TERMPWR and V

lines should be bypassed locally. A 2.2

F capacitor

and a 0.01

F high-frequency capacitor are recommended between TPWR and ground and placed as close

as possible to the DS2120. The DS2120 should be placed as close as possible to the SCSI connector to
minimize signal and power trace length, thereby lessening input capacitance and reflections that can
degrade the bus signals.

DS2120

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To maintain the specified regulation, a 4.7

F capacitor is required between the VREF pin and ground of

each DS2120. A high-frequency cap (0.1

F ceramic recommended) can also be placed on the VREF pin

in applications that use fast rise/fall-time drivers. A typical SCSI bus configuration is shown in Figure 2.

DIFFSENS Noise Filtering: The DS2120 incorporates a digital filter to remove high-frequency
transients on the DIFFSENS control line, thereby eliminating erroneous switching between modes. This
filter eliminates the need for the external capacitor and resistor, which previously performed this function.
The external filter can be used in addition to the digital filter if the DS2120 and DS2118M or DS2119M
are to be used interchangeably.

NOTES:

1) DIFFSENS: Refers to the SCSI bus signal.
2) DIFFSENSE: Refers to the Dallas Semiconductor pin name and internal circuitry relating to

differential sensing.

DS2120

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Table 1. PIN DESCRIPTION

DS2120E 28-Pin TSSOP

PIN

NAME

DESCRIPTION

VREF

Regulator Output Voltage. 1.25V reference in LVD mode; must be
decoupled with a 4.7µF cap.

25, 712,

1821, 2326

RxP, RxN

Signal Termination. Connect to SCSI bus signal lines.

6, 22

HS_GND

Heat Sink Ground. Internally connected to the mounting pad. Should be
connected to ground.

ISO

Isolation. When pulled high, terminating resistors and biasing current sources
are isolated from the SCSI bus.

GND

Signal Ground.

MSTR/SLV

Master/Slave. Mode select for the noncontrolling terminator. When pulled
high (MSTR), the DIFFSENS driver is enabled.

DIFFSENSE DIFFSENSE. Output to drive the SCSI bus DIFFSENS line.

DIFF_CAP

DIFFSENSE Capacitor. Connect a 0.1

F capacitor for DIFFSENSE filter.

Input to detect the type of device (differential or single -ended) on the SCSI
bus.

27, 28

TPWR

Termination Power. Connect to the SCSI TERMPWR line and decouple with
2.2

F capacitor.

DS2120B 36-Pin SSOP

PIN

NAME

DESCRIPTION

VREF

Regulator Output Voltage. 1.25V reference in LVD mode; must be
decoupled with a 4.7µF cap.

2, 3, 33, 35

No Connect. Do not connect pins.

47, 1116,

2225, 2932

RxP, RxN

Signal Termination. Connect to SCSI bus signal lines.

810, 2628

HS_GND

Heat Sink Ground. Internally connected to the mounting pad. Should be
connected to ground.

ISO

Isolation. When pulled high, terminating resistors and biasing current sources
are isolated from the SCSI bus.

GND

Signal Ground.

MSTR/SLV

Master/Slave. Mode select for the noncontrolling terminator. When pulled
high (MSTR), the DIFFSENS driver is enabled.

DIFFSENSE DIFFSENSE. Output to drive the SCSI bus DIFFSENS line.

DIFF_CAP

DIFFSENSE Capacitor. Connect a 0.1

F capacitor for DIFFSENSE filter.

Input to detect the type of device (differential or single ended) on the SCSI
bus.

LVD

Low-Voltage Differential. Output of DIFFSENSE receiver; output high
indicates LVD bus operation .

TPWR

Termination Power. Connect to the SCSI TERMPWR line and decouple with
2.2

F capacitor.

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RECOMMENDED OPERATING CONDITIONS

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS NOTES

Termpower Voltage, LVD Mode

TPWR

(LVD)

2.7

5.5

Logic 0

-0.3

+0.8

Logic 1

2.0

tpwr

+ 0.3

Operating Temperature

AMB

°C

LOW-VOLTAGE DIFFERENTIAL CHARACTERISTICS

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

Differential Mode
Termination Resistance

100

110

Common Mode Termination
Resistance

110

190

Differential Mode Bias

100

125

Common Mode Bias

1.125

1.375

Output Capacitance

OUT

Mode-Change Delay

0.66

1.25

1, 12

DC CHARACTERISTICS

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

Termpower Current

TPMR

2, 3

Input Leakage High

-1.0

µA

14, 15

Input Leakage Low

1.0

µA

14, 15

Output Current High

-1.0

4, 6

Output Current Low

4.0

5, 6

DIFF_CAP LVD
Operating Range

LVDOR

0.7

1.9

DIFFSENSE Driver
Output Voltage

DSO

1.2

1.4

7, 8

DIFFSENSE Driver
Source Current

DSH

7, 9, 11

DIFFSENSE Driver
Sink Current

DSL

200

µA

7, 10, 11

MSTR/SLV Input Leakage

MSTRSLV

-6.5

+125

µA

ISO Input Leakage

ISO

-125

+6.5

µA

Thermal Shutdown

150

°C

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REGULATOR CHARACTERISTICS

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

VREF Line Regulation

REG

1.0

2.0

VREF Load Regulation

REG

1.3

3.5

VREF Current Limit

LIM

200

VREF Sink Current

SINK

200

NOTES:

1) Guaranteed by design.
2) All lines open.
3) ISO = 1
4) V

OUT

= 2.4V

5) V

OUT

= 0.4V

6) LVD pin only.
7) MSTR/SLV = 1
8) I

= 0 to 5mA

9) V

DSO

= 0.0V

10) V

DSO

= 2.75V

11) TPWR = 5.5V
12) M

is extended by the RC time constant formed by the resistor connected from DIFFSENSE to

DIFF_CAP and the capacitor connected from DIFF_CAP to ground.

13) MSTR/SLV and ISO pins.
14) Terminator pins only.
15) DIFFCAP pin only.

DS2120

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DS2120B 36-PIN SSOP PACKAGE

DIM

MIN

MAX

2.44

2.64

0.12

0.29

0.43

0.23

0.32

15.20 15.54

10.11 10.52

7.40

7.60

0.80 BSC

0.25

0.71

0.51

1.02

NOTES:

1) Dimensions D and E1 include mold mismatch, but do not

include mold flash, protrusions, or gate burrs. Mold flash,
protrusions or gate burrs shall not exceed 0.254mm per side.

2) Section A-A dimensions apply to the flat section of the lead

between 0.13mm to 0.25mm from the lead tip.

3) The chamfer on the body is optional. If it is not present, a

visual index feature must be located within the cross-hatched
area.

Dimensions are in millimeters (mm).

Part Number DS2120