ChipFind - Datasheet

Part Number CY3663

Download:  PDF   ZIP
CY7C67200
Cypress Semiconductor Corporation
·
3901 North First Street
·
San Jose
,
CA 95134
·
408-943-2600
Document #: 38-08014 Rev. *E
Revised September 16, 2003
EZ-OTGTM
Programmable USB On-The-Go
Host/Peripheral Controller
CY7C67200
Document #: 38-08014 Rev. *E
Page 2 of 98
TABLE OF CONTENTS
1.0 INTRODUCTION ..............................................................................................................................9
1.1 EZ-OTG Features .......................................................................................................................9
2.0 TYPICAL APPLICATIONS .............................................................................................................10
3.0 FUNCTIONAL OVERVIEW ............................................................................................................10
3.1 Processor Core .........................................................................................................................10
3.1.1 Processor ........................................................................................................................................10
3.1.2 Clocking ..........................................................................................................................................10
3.1.3 Memory ...........................................................................................................................................10
3.1.4 Interrupts .........................................................................................................................................10
3.1.5 General Timers and Watchdog Timer .............................................................................................10
3.1.6 Power Management ........................................................................................................................10
4.0 INTERFACE DESCRIPTIONS .......................................................................................................11
4.1 USB Interface ............................................................................................................................11
4.1.1 USB Features ..................................................................................................................................12
4.1.2 USB Pins. ........................................................................................................................................12
4.2 OTG Interface ...........................................................................................................................12
4.2.1 OTG Features .................................................................................................................................12
4.2.2 OTG Pins. .......................................................................................................................................13
4.3 General Purpose I/O Interface ..................................................................................................13
4.3.1 GPIO Description ............................................................................................................................13
4.3.2 Unused Pin Descriptions .................................................................................................................13
4.4 UART Interface .........................................................................................................................13
4.4.1 UART Features ...............................................................................................................................13
4.4.2 UART Pins. .....................................................................................................................................13
4.5 I2C EEPROM Interface .............................................................................................................13
4.5.1 I2C EEPROM Features ...................................................................................................................13
4.5.2 I2C EEPROM Pins. .........................................................................................................................14
4.6 Serial Peripheral Interface ........................................................................................................14
4.6.1 SPI Features ...................................................................................................................................14
4.6.2 SPI Pins ..........................................................................................................................................14
4.7 High-Speed Serial Interface ......................................................................................................14
4.7.1 HSS Features ..................................................................................................................................14
4.7.2 HSS Pins .........................................................................................................................................15
4.8 Host Port Interface (HPI) ...........................................................................................................15
4.8.1 HPI Features ...................................................................................................................................15
4.8.2 HPI Pins ..........................................................................................................................................15
4.9 Charge Pump Interface .............................................................................................................16
4.9.1 Charge Pump Features ...................................................................................................................16
4.9.2 Charge Pump Pins ..........................................................................................................................17
4.10 Booster Interface .....................................................................................................................17
4.10.1 Booster Pins. .................................................................................................................................18
4.11 Crystal Interface ......................................................................................................................18
4.11.1 Crystal Pins. ..................................................................................................................................18
4.12 Boot Configuration Interface ...................................................................................................18
4.13 Operational Modes ..................................................................................................................19
4.13.1 Coprocessor Mode ........................................................................................................................19
4.13.2 Stand-alone Mode .........................................................................................................................19
CY7C67200
Document #: 38-08014 Rev. *E
Page 3 of 98
TABLE OF CONTENTS
(continued)
5.0 POWER SAVINGS AND RESET DESCRIPTION ..........................................................................20
5.1 Power Savings Mode Description .............................................................................................20
5.2 Sleep .........................................................................................................................................20
5.3 External (Remote) wakeup Source ...........................................................................................20
5.4 Power-On Reset (POR) Description .........................................................................................21
5.5 Reset Pin ..................................................................................................................................21
5.6 USB Reset ................................................................................................................................21
6.0 MEMORY MAP ...............................................................................................................................21
6.1 Mapping ....................................................................................................................................21
6.2 Internal Memory ........................................................................................................................21
7.0 REGISTERS ...................................................................................................................................23
7.1 Processor Control Registers .....................................................................................................23
7.1.1 CPU Flags Register [0xC000] [R] .................................................................................................23
7.1.2 Bank Register [0xC002] [R/W] ......................................................................................................24
7.1.3 Hardware Revision Register [0xC004] [R] ....................................................................................25
7.1.4 CPU Speed Register [0xC008] [R/W] ...........................................................................................25
7.1.5 Power Control Register [0xC00A] [R/W] .......................................................................................26
7.1.6 Interrupt Enable Register [0xC00E] [R/W] ....................................................................................28
7.1.7 Breakpoint Register [0xC014] [R/W] .............................................................................................29
7.1.8 USB Diagnostic Register [0xC03C] [R/W] .....................................................................................30
7.2 Timer Registers .........................................................................................................................31
7.2.1 Watchdog Timer Register [0xC00C] [R/W] ...................................................................................31
7.2.2 Timer n Register [R/W] ....................................................................................................................32
7.3 General USB Registers .............................................................................................................32
7.3.1 USB n Control Register [R/W] .........................................................................................................32
7.4 USB Host Only Registers ..........................................................................................................34
7.4.1 Host n Control Register [R/W] .........................................................................................................35
7.4.2 Host n Address Register [R/W] .......................................................................................................35
7.4.3 Host n Count Register [R/W] ...........................................................................................................36
7.4.4 Host n Endpoint Status Register [R] ...............................................................................................36
7.4.5 Host n PID Register [W] ..................................................................................................................38
7.4.6 Host n Count Result Register [R] ....................................................................................................39
7.4.7 Host n Device Address Register [W] ...............................................................................................39
7.4.8 Host n Interrupt Enable Register [R/W] ...........................................................................................40
7.4.9 Host n Status Register [R/W] ..........................................................................................................41
7.4.10 Host n SOF/EOP Count Register [R/W] ........................................................................................42
7.4.11 Host n SOF/EOP Counter Register [R] .........................................................................................42
7.4.12 Host n Frame Register [R] ............................................................................................................43
7.5 USB Device Only Registers ......................................................................................................43
7.5.1 Device n Endpoint n Control Register [R/W] ...................................................................................44
7.5.2 Device n Endpoint n Address Register [R/W] .................................................................................45
7.5.3 Device n Endpoint n Count Register [R/W] .....................................................................................46
7.5.4 Device n Endpoint n Status Register [R/W] ....................................................................................46
7.5.5 Device n Endpoint n Count Result Register [R/W] ..........................................................................48
7.5.6 Device n Interrupt Enable Register [R/W] .......................................................................................49
7.5.7 Device n Address Register [W] .......................................................................................................51
7.5.8 Device n Status Register [R/W] .......................................................................................................52
7.5.9 Device n Frame Number Register [R] .............................................................................................54
7.5.10 Device n SOF/EOP Count Register [W] ........................................................................................54
CY7C67200
Document #: 38-08014 Rev. *E
Page 4 of 98
TABLE OF CONTENTS
(continued)
7.6 OTG Control Registers .............................................................................................................55
7.6.1 OTG Control Register [0xC098] [R/W] ..........................................................................................55
7.7 GPIO Registers .........................................................................................................................56
7.7.1 GPIO Control Register [0xC006] [R/W] .........................................................................................57
7.7.2 GPIO 0 Output Data Register [0xC01E] [R/W] ................................................................................58
7.7.3 GPIO 1 Output Data Register [0xC024] [R/W] ................................................................................59
7.7.4 GPIO 0 Input Data Register [0xC020] [R] .....................................................................................59
7.7.5 GPIO 1 Input Data Register [0xC026] [R] .......................................................................................59
7.7.6 GPIO 0 Direction Register [0xC022] [R/W] ...................................................................................60
7.7.7 GPIO 1 Direction Register [0xC028] [R/W] ...................................................................................60
7.8 HSS Registers ..........................................................................................................................61
7.8.1 HSS Control Register [0xC070] [R/W] ..........................................................................................61
7.8.2 HSS Baud Rate Register [0xC072] [R/W] .....................................................................................63
7.8.3 HSS Transmit Gap Register [0xC074] [R/W] ..................................................................................63
7.8.4 HSS Data Register [0xC076] [R/W] ..............................................................................................64
7.8.5 HSS Receive Address Register [0xC078] [R/W] .............................................................................64
7.8.6 HSS Receive Counter Register [0xC07A] [R/W] ...........................................................................65
7.8.7 HSS Transmit Address Register [0xC07C] [R/W] .........................................................................65
7.8.8 HSS Transmit Counter Register [0xC07E] [R/W] ..........................................................................66
7.9 HPI Registers ............................................................................................................................66
7.9.1 HPI Breakpoint Register [0x0140] [R] .............................................................................................66
7.9.2 Interrupt Routing Register [0x0142] [R] ...........................................................................................67
7.9.3 SIEXmsg Register [W] ....................................................................................................................68
7.9.4 HPI Mailbox Register [0xC0C6] [R/W] ..........................................................................................69
7.9.5 HPI Status Port [] [HPI: R] ...............................................................................................................70
7.10 SPI Registers ..........................................................................................................................72
7.10.1 SPI Configuration Register [0xC0C8] [R/W] ................................................................................72
7.10.2 SPI Control Register [0xC0CA] [R/W] .........................................................................................74
7.10.3 SPI Interrupt Enable Register [0xC0CC] [R/W] ...........................................................................75
7.10.4 SPI Status Register [0xC0CE] [R] ...............................................................................................76
7.10.5 SPI Interrupt Clear Register [0xC0D0] [W] ....................................................................................77
7.10.6 SPI CRC Control Register [0xC0D2] [R/W] .................................................................................77
7.10.7 SPI CRC Value Register [0xC0D4] [R/W] ...................................................................................78
7.10.8 SPI Data Register [0xC0D6] [R/W] .............................................................................................79
7.10.9 SPI Transmit Address Register [0xC0D8] [R/W] .........................................................................79
7.10.10 SPI Transmit Count Register [0xC0DA] [R/W] ............................................................................79
7.10.11 SPI Receive Address Register [0xC0DC [R/W] ........................................................................80
7.10.12 SPI Receive Count Register [0xC0DE] [R/W] ...........................................................................80
7.11 UART Registers ......................................................................................................................81
7.11.1 UART Control Register [0xC0E0] [R/W] ......................................................................................81
7.11.2 UART Status Register [0xC0E2] [R] ...........................................................................................82
7.11.3 UART Data Register [0xC0E4] [R/W] ..........................................................................................82
8.0 PIN DIAGRAM ................................................................................................................................83
9.0 PIN DESCRIPTIONS ......................................................................................................................84
10.0 ABSOLUTE MAXIMUM RATINGS ..............................................................................................85
11.0 OPERATING CONDITIONS .........................................................................................................85
12.0 CRYSTAL REQUIREMENTS (XTALIN, XTALOUT) ...................................................................86
13.0 DC CHARACTERISTICS ...........................................................................................................86
13.1 USB Transceiver .....................................................................................................................87
CY7C67200
Document #: 38-08014 Rev. *E
Page 5 of 98
TABLE OF CONTENTS
(continued)
14.0 AC TIMING CHARACTERISTICS ................................................................................................87
14.1 Reset Timing ...........................................................................................................................87
14.2 Clock Timing ...........................................................................................................................88
14.3 I2C EEPROM Timing ..............................................................................................................88
14.4 HPI (Host Port Interface) Write Cycle Timing .........................................................................89
14.5 HPI (Host Port Interface) Read Cycle Timing .........................................................................90
14.6 HSS BYTE Mode Transmit .....................................................................................................91
14.7 HSS Block Mode Transmit ......................................................................................................91
14.8 HSS BYTE and BLOCK Mode Receive ..................................................................................91
14.9 Hardware CTS/RTS Handshake .............................................................................................92
15.0 REGISTER SUMMARY ................................................................................................................93
16.0 ORDERING INFORMATION ........................................................................................................97
17.0 PACKAGE DIAGRAMS ...............................................................................................................97