®
VFC32
International Airport Industrial Park
· Mailing Address: PO Box 11400
· Tucson, AZ 85734 · Street Address: 6730 S. Tucson Blvd.
· Tucson, AZ 85706
Tel: (602) 746-1111 · Twx: 910-952-1111 · Cable: BBRCORP · Telex: 066-6491 · FAX: (602) 889-1510 · Immediate Product Info: (800) 548-6132
FEATURES
q
OPERATION UP TO 500kHz
q
EXCELLENT LINEARITY
±
0.01% max at 10kHz FS
±
0.05% max at 100kHz FS
q
V/F OR F/V CONVERSION
q
MONOTONIC
q
VOLTAGE OR CURRENT INPUT
APPLICATIONS
q
INTEGRATING A/D CONVERTER
q
SERIAL FREQUENCY OUTPUT
q
ISOLATED DATA TRANSMISSION
q
FM ANALOG SIGNAL MOD/DEMOD
q
MOTOR SPEED CONTROL
q
TACHOMETER
DESCRIPTION
The VFC32 voltage-to-frequency converter provides
an output frequency accurately proportional to its
input voltage. The digital open-collector frequency
output is compatible with all common logic families.
Its integrating input characteristics give the VFC32
excellent noise immunity and low nonlinearity.
Full-scale output frequency is determined by an exter-
nal capacitor and resistor and can be scaled over a
wide range. The VFC32 can also be configured as a
frequency-to-voltage converter.
The VFC32 is available in 14-pin plastic DIP, SO-14
surface-mount, and metal TO-100 packages. Commer-
cial, industrial, and military temperature range models
are available.
Voltage-to-Frequency
and Frequency-to-Voltage
CONVERTER
In
One-Shot
+V
CC
f
OUT
V
CC
VFC32
Common
+In
Comparator
Input
V
OUT
One-Shot
Capacitor
©
1977 Burr-Brown Corporation
PDS-372G
Printed in U.S.A. October, 1998
2
VFC32
SPECIFICATIONS
At T
A
= +25
°
C and V
CC
=
±
15V, unless otherwise noted.
V
Specification the same as VFC32KP.
NOTES: (1) A 25% duty cycle (0.25mA input current) is recommended for best linearity. (2) Adjustable to zero. See Offset and Gain Adjustment section. (3) Linearity error is specified
at any operating frequency from the straight line intersecting 90% of full scale frequency and 0.1% of full scale frequency. See Discussion of Specifications section. Above 200kHz,
it is recommended all grades be operated below +85
°
C. (4)
±
0.015% of FSR for negative inputs shown in Figure 5. Positive inputs are shown in Figure 1. (5) FSR = Full Scale Range
(corresponds to full scale frequency and full scale input voltage). (6) Exclusive of external components' drift. (7) Positive drift is defined to be increasing frequency with increasing
temperature. (8) For operations above 200kHz up to 500kHz, see Discussion of Specifications and Installation and Operation sections. (9) One pulse of new frequency plus 1
µ
s.
VFC32KP, KU
VFC32BM
VFC32SM
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
INPUT (V/F CONVERTER) F
OUT
= V
IN
/7.5 R
1
C
1
Voltage Range
(1)
Positive Input
>0
+0.25mA
V
V
V
V
V
x R
1
Negative Input
>0
10
V
V
V
V
V
Current Range
(1)
>0
+0.25
V
V
V
V
mA
Bias Current
Inverting Input
20
100
V
V
V
V
nA
Noninverting Input
100
250
V
V
V
V
nA
Offset Voltage
(2)
1
4
V
V
V
V
mV
Differential Impedance
300 || 10
650 || 10
V
V
V
V
k
|| pF
Common-mode
Impedance
300 || 3
500 || 3
V
V
V
V
M
|| pF
INPUT (F/V CONVERTER) V
OUT
= 7.5 R
1
C
1
F
IN
Impedance
50 || 10
150 || 10
V
V
V
V
k
|| pF
Logic "1"
+1.0
V
V
V
V
V
Logic "0"
0.05
V
V
V
V
V
Pulse-width Range
0.1
150k/F
MAX
V
V
V
V
µ
s
ACCURACY
Linearity Error
(3)
0.01Hz
Oper
Freq
10kHz
±
0.005
±
0.010
(4)
V
V
V
V
% of FSR
(5)
0.1Hz
Oper
Freq
100kHz
±
0.025
±
0.05
V
V
V
V
% of FSR
0.5Hz
Oper
Freq
500kHz
±
0.05
V
V
% of FSR
Offset Error Input
Offset Votlage
(2)
1
4
V
V
V
V
mV
Offset Drift
(6)
±
3
V
V
ppm of FSR/
°
C
Gain Error
(2)
5
V
V
% of FSR
Gain Drift
(6)
f = 10kHz
±
75
±
50
±
100
±
70
±
150
ppm/
°
C
Full Scale Drift
f = 10kHz
±
75
±
50
±
100
±
70
±
150
ppm of FSR/
°
C
(offset drift and
gain drift)
(6, 7)
Power Supply
f = DC,
±
V
CC
= 12VDC
Sensitivity
to 18VDC
±
0.015
V
V
% of FSR/%
OUTPUT (V/F CONVERTER) (open collector output)
Voltage, Logic "0"
I
SINK
= 8mA
0
0.2
0.4
V
V
V
V
V
V
V
Leakage Current,
Logic "1"
V
O
= 15V
0.01
1.0
V
V
V
V
µ
A
Voltage, Logic "1"
External Pull-up Resistor
Required (see Figure 4)
V
PU
V
V
V
Pulse Width
For Best Linearity
0.25/F
MAX
V
V
s
Fall Time
I
OUT
= 5mA, C
LOAD
= 500pF
400
V
V
ns
OUTPUT (F/V CONVERTER) V
OUT
Voltage
I
O
7mA
0 to +10
V
V
V
Current
V
O
7VDC
+10
V
V
mA
Impedance
Closed Loop
1
V
V
Capacitive Load
Without Oscillation
100
V
V
pF
DYNAMIC RESPONSE
Full Scale Frequency
500
(8)
V
V
kHz
Dynamic Range
6
V
V
decades
Settling Time
(V/F) to Specified Linearity
for a Full Scale Input Step
(9)
V
V
Overload Recovery
< 50% Overload
(9)
V
V
POWER SUPPLY
Rated Voltage
±
15
V
Voltage Range
±
11
±
20
V
V
Quiescent Current
±
5.5
±
6.0
V
V
V
mA
TEMPERATURE RANGE
Specification
0
+70
25
+85
55
+125
°
C
Operating
25
+85
55
+125
55
+125
°
C
Storage
25
+85
65
+150
65
+150
°
C
3
VFC32
Supply Voltage ...................................................................................
±
22V
Output Sink Current (F
OUT
) ................................................................ 50mA
Output Current (V
OUT
) ...................................................................... +20mA
Input Voltage, Input .....................................................................
±
Supply
Input Voltage, +Input .....................................................................
±
Supply
Comparator Input ..........................................................................
±
Supply
Storage Temperature Range:
VFC32BM, SM ............................................................. 65
°
C to +150
°
C
VFC32KP, KU ................................................................ 25
°
C to +85
°
C
ABSOLUTE MAXIMUM RATINGS
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
PIN CONFIGURATIONS
Top View
+V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Input
Amp
Switch
One-
shot
NC
NC
V
CC
f
OUT
In
NC
One-Shot
Capacitor
V
OUT
Common
+In
NC
NC
Comparator
Input
P Package
U Package
(Epoxy Dual-in-line)
+V
CC
Switch
NC
V
CC
(Case)
f
OUT
+In
One-Shot
Capacitor
Common
In
Comparator
Input
M Package
(TO-100)
1
3
4
5
6
7
8
9
10
V
OUT
NC = no internal connection
External connection permitted.
2
One-
shot
Input Amp
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published specifi-
cations.
PACKAGE
DRAWING
TEMPERATURE
PRODUCT
PACKAGE
NUMBER
(1)
RANGE
VFC32KP
14-Pin Plastic DIP
010
0
°
C to 70
°
C
VFC32BM
TO-100 Metal
007
25
°
C to +85
°
C
VFC32SM
TO-100 Metal
007
55
°
C to +125
°
C
VFC32KU
SO-14 SOIC
235
0
°
C to +70
°
C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
4
VFC32
TYPICAL PERFORMANCE CURVES
At T
A
= +25
°
C and V
CC
=
±
15V, unless otherwise noted.
1k
1M
Full Scale Frequency (Hz)
0.10
0.001
Typical Linearity Error (% of FSR)
10k
100k
0.01
T
A
= +25°C
LINEARITY ERROR vs FULL SCALE FREQUENCY
Duty Cycle = 25%
at Full Scale
0
10k
Operating Frequency (Hz)
1
1.0
Linearity Error (Hz)
1k
7k
0
LINEARITY ERROR vs OPERATING FREQUENCY
2k
3k
4k
5k
6k
8k
9k
0.5
0.5
f
FULL SCALE
= 10kHz, 25% Duty Cycle
T
A
= +25°C
1k
1M
Full Scale Frequency (Hz)
1000
10
Full Scale Temp Drift (ppm of FSR/°C)
10k
100k
100
(SM, KP, KU)
FULL SCALE DRIFT vs FULL SCALE FREQUENCY
(BM)
5
VFC32
APPLICATION INFORMATION
Figure 1 shows the basic connection diagram for frequency-
to-voltage conversion. R
1
sets the input voltage range. For a
10V full-scale input, a 40k
input resistor is recommended.
Other input voltage ranges can be achieved by changing the
value of R
1
.
R
1
should be a metal film type for good stability. Manufac-
turing tolerances can produce approximately
±
10% variation
in output frequency. Full-scale output frequency can be
trimmed by adjusting the value of R
1
--see Figure 3.
The full-scale output frequency is determined by C
1
. Values
shown in Figure 1 are for a full-scale output frequency of
10kHz. Values for other full-scale frequencies can be read
from Figure 2. Any variation in C
1
--tolerance, temperature
drift, aging--directly affect the output frequency. Ceramic
NPO or silver-mica types are a good choice.
For full-scale frequencies above 200kHz, use larger capaci-
tor values as indicated in Figure 2, with R
1
= 20k
.
The value of the integrating capacitor, C
2
, does not directly
influence the output frequency, but its value must be chosen
within certain bounds. Values chosen from Figure 2 produce
approximately 2.5Vp-p integrator voltage waveform. If C
2
's
value is made too low, the integrator output voltage can
exceed its linear output swing, resulting in a nonlinear
response. Using C
2
values larger than shown in Figure 2 is
acceptable.
Accuracy or temperature stability of C
2
is not critical be-
cause its value does not directly affect the output frequency.
For best linearity, however, C
2
should have low leakage and
low dielectric absorption. Polycarbonate and other film
capacitors are generally excellent. Many ceramic types are
adequate, but some low-voltage ceramic capacitor types
may degrade nonlinearity. Electrolytic types are not recom-
mended.
FREQUENCY OUTPUT PIN
The frequency output terminal is an open-collector logic
output. A pull-up resistor is usually connected to a 5V logic
supply to create standard logic-level pulses. It can, however,
be connected to any power supply up to +V
CC
. Output pulses
have a constant duration and positive-going during the one-
shot period. Current flowing in the open-collector output
transistor returns through the Common terminal. This termi-
nal should be connected to logic ground.
(1)
FIGURE 1. Voltage-to-Frequency Converter Circuit.
f
O
V
INT
V
IN
One-Shot
+15V
f
OUT
0 to 10kHz
V
INT
C
2
R
1
40k
0 to 10V
10nF film
0.1µF
15V
0.1µF
C
1
3.3nF
NPO Ceramic
+5V
R
PU
4.7k
VFC32
Pinout shown is
for DIP or SOIC
packages.
Pull-Up Voltage
0V
V
PU
+V
CC
V
PU
R
PU
8mA
R
1
=
V
FS
0.25mA
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