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1
®
DAC7644
16-Bit, Quad Voltage Output
DIGITAL-TO-ANALOG CONVERTER
®
DAC7644
DESCRIPTION
The DAC7644 is a 16-bit, quad voltage output digital-
to-analog converter with guaranteed 15-bit monotonic
performance over the specified temperature range. It
accepts 16-bit parallel input data, has double-buffered
DAC input logic (allowing simultaneous update of all
DACs), and provides a readback mode of the internal
input registers. Programmable asynchronous reset clears
all registers to a mid-scale code of 8000
H
or to a zero-
scale of 0000
H
. The DAC7644 can operate from a single
+5V supply or from +5V and 5V supplies.
Low power and small size per DAC make the DAC7644
ideal for automatic test equipment, DAC-per-pin pro-
grammers, data acquisition systems, and closed-loop
servo-control. The DAC7644 is available in a 48-lead
SSOP package and offers guaranteed specifications
over the 40
°
C to +85
°
C temperature range.
FEATURES
q
LOW POWER: 10mW
q
UNIPOLAR OR BIPOLAR OPERATION
q
SETTLING TIME: 10
µ
s to 0.003%
q
15-BIT LINEARITY AND MONOTONICITY:
40
°
C to +85
°
C
q
PROGRAMMABLE RESET TO MID-SCALE
OR ZERO-SCALE
q
DATA READBACK
q
DOUBLE-BUFFERED DATA INPUTS
APPLICATIONS
q
PROCESS CONTROL
q
CLOSED-LOOP SERVO-CONTROL
q
MOTOR CONTROL
q
DATA ACQUISITION SYSTEMS
q
DAC-PER-PIN PROGRAMMERS
© 1999 Burr-Brown Corporation
PDS-1535B
Printed in U.S.A. November, 1999
International Airport Industrial Park · Mailing Address: PO Box 11400, Tucson, AZ 85734 · Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 · Tel: (520) 746-1111
Twx: 910-952-1111 · Internet: http://www.burr-brown.com/ · Cable: BBRCORP · Telex: 066-6491 · FAX: (520) 889-1510 · Immediate Product Info: (800) 548-6132
DAC7644
DAC A
DAC
Register A
Input
Register A
I/O
Buffer
Control
Logic
DAC B
DAC
Register B
Input
Register B
DAC C
DAC
Register C
Input
Register C
DAC D
DAC
Register D
Input
Register D
V
REF
L AB
V
REF
H AB
V
REF
H
AB Sense
V
REF
L
AB Sense
V
OUT
D
V
OUT
C
V
OUT
B
V
OUT
A
V
OUT
B
Sense
V
REF
L CD V
REF
H CD
RST
LOADDACS
A1
A0
CS
R/W
DATA I/O
16
RSTSEL
AGND
DGND
V
OUT
C
Sense
V
OUT
D
Sense
V
OUT
A
Sense
V
CC
V
SS
V
DD
DAC7644
V
REF
L
CD Sense
V
REF
H
CD Sense
For most current data sheet and other product
information, visit www.burr-brown.com
2
®
DAC7644
DAC7644E
DAC7644EB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ACCURACY
Linearity Error
±
3
±
4
±
2
±
3
LSB
Linearity Match
±
4
±
2
LSB
Differential Linearity Error
±
2
±
3
±
1
±
2
LSB
Monotonicity, T
MIN
to T
MAX
14
15
Bits
Bipolar Zero Error
±
1
±
2
T
T
mV
Bipolar Zero Error Drift
5
10
T
T
ppm/
°
C
Full-Scale Error
±
1
±
2
T
T
mV
Full-Scale Error Drift
5
10
T
T
ppm/
°
C
Bipolar Zero Matching
Channel-to-Channel Matching
±
1
±
2
±
1
±
2
mV
Full Scale Matching
Channel-to-Channel Matching
±
1
±
2
±
1
±
2
mV
Power Supply Rejection Ratio (PSRR)
At Full Scale
10
100
T
T
ppm/V
ANALOG OUTPUT
Voltage Output
V
REF
= 2.5V, R
L
= 10k
, V
SS
= 5V
V
REF
L
V
REF
H
T
T
V
Output Current
1.25
+1.25
T
T
mA
Maximum Load Capacitance
No Oscillation
500
T
pF
Short-Circuit Current
10, +30
T
mA
Short-Circuit Duration
GND or V
CC
or V
SS
Indefinite
T
REFERENCE INPUT
Ref High Input Voltage Range
V
REF
L + 1.25
+2.5
T
T
V
Ref Low Input Voltage Range
2.5
V
REF
H 1.25
T
T
V
Ref High Input Current
500
T
µ
A
Ref Low Input Current
500
T
µ
A
DYNAMIC PERFORMANCE
Settling Time
To
±
0.003%, 5V Output Step
8
10
T
T
µ
s
Channel-to-Channel Crosstalk
See Figure 5.
0.5
T
LSB
Digital Feedthrough
2
T
nV-s
Output Noise Voltage
f = 10kHz
60
T
nV/
Hz
DAC Glitch
7FFF
H
to 8000
H
or 8000
H
to 7FFF
H
40
T
nV-s
DIGITAL INPUT
V
IH
0.7 · V
DD
T
V
V
IL
0.3 · V
DD
T
V
I
IH
±
10
T
µ
A
I
IL
±
10
T
µ
A
DIGITAL OUTPUT
V
OH
I
OH
= 0.8mA
3.6
4.5
T
T
V
V
OL
I
OL
= 1.2mA
0.3
0.4
T
T
V
POWER SUPPLY
V
DD
+4.75
+5.0
+5.25
T
T
T
V
V
CC
+4.75
+5.0
+5.25
T
T
T
V
V
SS
5.25
5.0
4.75
T
T
T
V
I
CC
1.5
2
T
T
mA
I
DD
50
T
µ
A
I
SS
2.3
1.5
T
T
mA
Power
15
20
T
T
mW
TEMPERATURE RANGE
Specified Performance
40
+85
T
T
°
C
T
Specifications same as DAC7644E.
SPECIFICATIONS
(Dual Supply)
At T
A
= T
MIN
to T
MAX
, V
DD
= V
CC
= +5V, V
SS
= 5V, V
REF
H = +2.5V, and V
REF
L = 2.5V, unless otherwise noted.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
3
®
DAC7644
DAC7644E
DAC7644EB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ACCURACY
Linearity Error
(1)
±
3
±
4
±
2
±
3
LSB
Linearity Match
±
4
±
2
LSB
Differential Linearity Error
±
2
±
3
±
1
±
2
LSB
Monotonicity, T
MIN
to T
MAX
14
15
Bits
Zero Scale Error
±
1
±
2
T
T
mV
Zero Scale Error Drift
5
10
T
T
ppm/
°
C
Full-Scale Error
±
1
±
2
T
T
mV
Full-Scale Error Drift
5
10
T
T
ppm/
°
C
Zero Scale Matching
Channel-to-Channel Matching
±
1
±
2
±
1
±
2
mV
Full-Scale Matching
Channel-to-Channel Matching
±
1
±
2
±
1
±
2
mV
Power Supply Rejection Ratio (PSRR)
At Full Scale
10
100
T
T
ppm/V
ANALOG OUTPUT
Voltage Output
V
REF
L = 0V, V
SS
= 0V, R
L
= 10k
0
V
REF
H
T
T
V
Output Current
1.25
+1.25
T
T
mA
Maximum Load Capacitance
No Oscillation
500
T
pF
Short-Circuit Current
±
30
T
mA
Short-Circuit Duration
GND or V
CC
Indefinite
T
REFERENCE INPUT
Ref High Input Voltage Range
V
REF
L + 1.25
+2.5
T
T
V
Ref Low Input Voltage Range
0
V
REF
H 1.25
T
T
V
Ref High Input Current
250
T
µ
A
Ref Low Input Current
250
T
µ
A
DYNAMIC PERFORMANCE
Settling Time
To
±
0.003%, 2.5V Output Step
8
10
T
T
µ
s
Channel-to-Channel Crosstalk
See Figure 6.
0.5
T
LSB
Digital Feedthrough
2
T
nV-s
Output Noise Voltage, f = 10kHz
60
T
nV/
Hz
DAC Glitch
7FFF
H
to 8000
H
or 8000
H
to 7FFF
H
40
T
nV-s
DIGITAL INPUT
V
IH
0.7 · V
DD
T
V
V
IL
0.3 · V
DD
T
V
I
IH
±
10
T
µ
A
I
IL
±
10
T
µ
A
DIGITAL OUTPUT
V
OH
I
OH
= 0.8mA
3.6
4.5
T
T
V
V
OL
I
OL
= 1.2mA
0.3
0.4
T
T
V
POWER SUPPLY
V
DD
+4.75
+5.0
+5.25
T
T
T
V
V
CC
+4.75
+5.0
+5.25
T
T
T
V
V
SS
0
0
0
T
T
T
V
I
CC
1.5
2
T
T
mA
I
DD
50
T
µ
A
Power
7.5
10
T
T
mW
TEMPERATURE RANGE
Specified Performance
40
+85
T
T
°
C
NOTE: (1) If V
SS
= 0V specification applies at Code 0040
H
and above due to possible negative zero-scale error.
T
Specifications same as DAC7644E.
SPECIFICATIONS
(Single Supply)
At T
A
= T
MIN
to T
MAX
, V
DD
= V
CC
= +5V, V
SS
= 0V, V
REF
H = +2.5V, and V
REF
L = 0V, unless otherwise noted.
4
®
DAC7644
LINEARITY
DIFFERENTIAL
PACKAGE
SPECIFICATION
ERROR
NONLINEARITY
DRAWING
TEMPERATURE
ORDERING
TRANSPORT
PRODUCT
(LSB)
(LSB)
PACKAGE
NUMBER
(1)
RANGE
NUMBER
(2)
MEDIA
DAC7644E
±
4
±
3
48-Lead SSOP
333
40
°
C to +85
°
C
DAC7644E
Rails
"
"
"
"
"
"
DAC7644E/1K
Tape and Reel
DAC7644EB
±
3
±
2
48-Lead SSOP
333
40
°
C to +85
°
C
DAC7644EB
Rails
"
"
"
"
"
"
DAC7644EB/1K
Tape and Reel
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/)
are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of "DAC7644/1K" will get a single
1000-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
ABSOLUTE MAXIMUM RATINGS
(1)
V
CC
and V
DD
to V
SS
.............................................................. 0.3V to 11V
V
CC
and V
DD
to GND ........................................................... 0.3V to 5.5V
V
REF
L
to V
SS
............................................................. 0.3V to (V
CC
V
SS
)
V
CC
to V
REF
H ............................................................ 0.3V to (V
CC
V
SS
)
V
REF
H
to V
REF
L ......................................................... 0.3V to (V
CC
V
SS
)
Digital Input Voltage to GND ................................... 0.3V to V
DD
+ 0.3V
Digital Output Voltage to GND ................................. 0.3V to V
DD
+ 0.3V
Maximum Junction Temperature ................................................... +150
°
C
Operating Temperature Range ........................................ 40
°
C to +85
°
C
Storage Temperature Range ......................................... 65
°
C to +125
°
C
Lead Temperature (soldering, 10s) ............................................... +300
°
C
NOTE: (1) Stresses above those listed under "Absolute Maximum Ratings"
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION
5
®
DAC7644
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
1
DB15
Data Bit 15, MSB
2
DB14
Data Bit 14
3
DB13
Data Bit 13
4
DB12
Data Bit 12
5
DB11
Data Bit 11
6
DB10
Data Bit 10
7
DB9
Data Bit 9
8
DB8
Data Bit 8
9
DB7
Data Bit 7
10
DB6
Data Bit 6
11
DB5
Data Bit 5
12
DB4
Data Bit 4
13
DB3
Data Bit 3
14
DB2
Data Bit 2
15
DB1
Data Bit 1
16
DB0
Data Bit 0, LSB
17
RSTSEL
Reset Select. Determines the action of RST. If
HIGH, a RST command will set the DAC registers to
mid-scale. If LOW, a RST command will set the DAC
registers to zero.
18
RST
Reset, Rising Edge Triggered. Depending on the
state of RSTSEL, the DAC registers are set to either
mid-scale or zero.
19
LOADDACS
DAC Output Registers Load Control. Rising edge
triggered.
20
R/W
Enabled by the CS, Controls Data Read and Write
from the Input Registers.
21
A1
Enabled by the CS, in Combination With A0 Selects
the Individual DAC Input Registers.
22
A0
Enabled by the CS, in Combination With A1 Selects
the Individual DAC Input Registers.
Top View
SSOP
PIN CONFIGURATION
PIN
NAME
DESCRIPTION
23
CS
Chip Select. Active LOW.
24
DGND
Digital Ground
25
V
DD
Positive Power Supply (digital)
26
V
CC
Positive Power Supply (analog)
27
AGND
Analog Ground
28
V
SS
Negative Power Supply
29
V
OUT
D
DAC D Voltage Output
30
V
OUT
D Sense
DAC D's Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
31
V
REF
L CD Sense
DAC C and D Reference Low Sense Input
32
V
REF
L CD
DAC C and D Reference Low Input
33
V
REF
H CD
DAC C and D Reference High Input
34
V
REF
H CD Sense
DAC C and D Reference High Sense Input
35
V
OUT
C
DAC C Voltage Output
36
V
OUT
C Sense
DAC C's Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
37
V
OUT
B
DAC B Voltage Output
38
V
OUT
B Sense
DAC B's Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
39
V
REF
H AB Sense
DAC A and B Reference High Sense Input
40
V
REF
H AB
DAC A and B Reference High Input
41
V
REF
L AB
DAC A and B Reference Low Input
42
V
REF
L AB Sense
DAC A and B Reference Low Sense Input
43
V
OUT
A
DAC A Voltage Input
44
V
OUT
A Sense
DAC A's Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
45
NC
No Connection
46
NC
No Connection
47
NC
No Connection
48
NC
No Connection
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
RSTSEL
RST
LOADDACS
R/W
A1
A0
CS
DGND
NC
NC
NC
NC
V
OUT
A Sense
V
OUT
A
V
REF
L AB Sense
V
REF
L AB
V
REF
H AB
V
REF
H AB Sense
V
OUT
B Sense
V
OUT
B
V
OUT
C Sense
V
OUT
C
V
REF
H CD Sense
V
REF
H CD
V
REF
L CD
V
REF
L CD Sense
V
OUT
D Sense
V
OUT
D
V
SS
AGND
V
CC
V
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
DAC7644
6
®
DAC7644
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +85
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
TYPICAL PERFORMANCE CURVES: V
SS
= 0V
At T
A
= +25
°
C, V
DD
= V
CC
= +5V, V
SS
= 0V, V
REFH
= +2.5V, V
REFL
= 0V, representative unit, unless otherwise specified.
+25
°
C
+85
°
C
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +85
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
7
®
DAC7644
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, +85
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
TYPICAL PERFORMANCE CURVES: V
SS
= 0V
(CONT)
At T
A
= +25
°
C, V
DD
= V
CC
= +5V, V
SS
= 0V, V
REFH
= +2.5V, V
REFL
= 0V, representative unit, unless otherwise specified.
+85
°
C
(cont)
40
°
C
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, +85
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, 40
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, 40
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, 40
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, 40
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
8
®
DAC7644
TYPICAL PERFORMANCE CURVES: V
SS
= 0V
(CONT)
At T
A
= +25
°
C, V
DD
= V
CC
= +5V, V
SS
= 0V, V
REFH
= +2.5V, V
REFL
= 0V, representative unit, unless otherwise specified.
2
1.5
1
0.5
0
0.5
1
1.5
2
Temperature (
°
C)
40
25
85
0
25
55
ZERO-SCALE ERROR vs TEMPERATURE
UPO (mV)
DAC C
DAC A
DAC D
DAC B
Code (0040
H
)
2
1.5
1
0.5
0
0.5
1
1.5
2
Temperature (
°
C)
40
25
85
0
25
55
FULL-SCALE ERROR vs TEMPERATURE
Positive Full-Scale Error (mV)
DAC C
DAC A
DAC B
DAC D
Code (FFFF
H
)
0.30
0.25
0.20
0.15
0.10
0.05
0.00
V
REFH
CURRENT vs CODE
(all DACs sent to indicated code)
V
REF
Current (mA)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
0.00
0.05
0.10
0.15
0.20
0.25
0.30
V
REFL
CURRENT vs CODE
(all DACs sent to indicated code)
V
REF
Current (mA)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2
1.5
1
0.5
0
Temperature (
°
C)
40
25
85
0
25
55
POSITIVE SUPPLY CURRENT vs TEMPERATURE
I
CC
(mA)
Data = FFFF
H
(all DACs)
No Load
2
1.5
1
0.5
0
Digital Input Code
0000
H
0200
H
0400
H
0800
H
1000
H
2000
H
4000
H
6000
H
8000
H
A000
H
C000
H
E000
H
FFFF
H
POSITIVE SUPPLY CURRENT
vs DIGITAL INPUT CODE
I
CC
(mA)
No Load
All DACs
One DAC
9
®
DAC7644
TYPICAL PERFORMANCE CURVES: V
SS
= 0V
(CONT)
At T
A
= +25
°
C, V
DD
= V
CC
= +5V, V
SS
= 0V, V
REFH
= +2.5V, V
REFL
= 0V, representative unit, unless otherwise specified.
+5V
LDAC
0
Time (2
µ
s/div)
OUTPUT VOLTAGE vs SETTLING TIME
(0V to +2.5V)
Output Voltage
Large-Signal Settling Time: 0.5V/div
Small-Signal Settling Time: 4LSB/div
Time (2
µ
s/div)
OUTPUT VOLTAGE vs SETTLING TIME
(+2.5V to 2mV)
Output Voltage
+5V
LDAC
0
Large-Signal Settling Time: 0.5V/div
Small-Signal Settling Time: 4LSB/div
Time (1
µ
s/div)
OUTPUT VOLTAGE
vs MIDSCALE GLITCH PERFORMANCE
Output Voltage (50mV/div)
+5V
LDAC
0
7FFF
H
to 8000
H
Time (1
µ
s/div)
OUTPUT VOLTAGE
vs MIDSCALE GLITCH PERFORMANCE
Output Voltage (50mV/div)
+5V
LDAC
0
8000
H
to 7FFF
H
1000
100
10
Frequency (Hz)
10
100
1000
10000
100000
1000000
OUTPUT NOISE VOLTAGE vs FREQUENCY
Noise (nV/
Hz)
BROADBAND NOISE
Time (10
µ
s/div)
Noise Voltage (50
µ
V/div)
BW = 10kHz
Code = 8000
H
10
®
DAC7644
TYPICAL PERFORMANCE CURVES: V
SS
= 0V
(CONT)
At T
A
= +25
°
C, V
DD
= V
CC
= +5V, V
SS
= 0V, V
REFH
= +2.5V, V
REFL
= 0V, representative unit, unless otherwise specified.
12
10
8
6
4
2
0
Logic Input Level for Data Bits (V)
0
1
2
3
4
5
LOGIC SUPPLY CURRENT
vs LOGIC INPUT LEVEL FOR DATA BITS
Logic Supply Current (mA)
5
4
3
2
1
0
R
LOAD
(k
)
0.01
0.1
1
10
100
V
OUT
vs R
LOAD
V
OUT
(V)
Source
Sink
11
®
DAC7644
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +85
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +85
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
TYPICAL PERFORMANCE CURVES: V
SS
= 5V
At T
A
= +25
°
C, V
DD
= V
CC
= +5V, V
SS
= 5V, V
REFH
= +2.5V, V
REFL
= 2.5V, representative unit, unless otherwise specified.
+85
°
C
+25
°
C
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
12
®
DAC7644
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, 40
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC B, 40
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC D, +85
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
TYPICAL PERFORMANCE CURVES: V
SS
= 5V
(CONT)
At T
A
= +25
°
C, V
DD
= V
CC
= +5V, V
SS
= 5V, V
REFH
= +2.5V, V
REFL
= 2.5V, representative unit, unless otherwise specified.
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, 40
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
40
°
C
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, +85
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.5
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC C, 40
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
+85
°
C
(cont)
13
®
DAC7644
TYPICAL PERFORMANCE CURVES: V
SS
= 5V
(CONT)
At T
A
= +25
°
C, V
DD
= V
CC
= +5V, V
SS
= 5V, V
REFH
= +2.5V, V
REFL
= 2.5V, representative unit, unless otherwise specified.
2
1.5
1
0.5
0
0.5
1
1.5
2
Temperature (
°
C)
40
25
85
0
25
55
ZERO-SCALE ERROR vs TEMPERATURE
(Code 8000
H
)
Zero-Scale Error (mV)
DAC B
DAC D
DAC A
DAC C
2
1.5
1
0.5
0
0.5
1
1.5
2
Temperature (
°
C)
40
25
85
0
25
55
POSITIVE FULL-SCALE ERROR vs TEMPERATURE
(Code FFFF
H
)
Positive Full-Scale Error (mV)
DAC B
DAC D
DAC A
DAC C
+0.6
+0.5
+0.4
+0.3
+0.2
+0.1
0.0
V
REFH
CURRENT vs CODE
(all DACs sent to indicated code)
V
REF
Current (mA)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
0.0
0.1
0.2
0.3
0.4
0.5
0.6
V
REFL
CURRENT vs CODE
(all DACs sent to indicated code)
V
REF
Current (mA)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2
1.5
1
0.5
0
0.5
1
1.5
2
Temperature (
°
C)
40
25
85
0
25
55
NEGATIVE FULL-SCALE ERROR vs TEMPERATURE
(Code 0000
H
)
Negative Full-Scale Error (mV)
DAC D
DAC B
DAC A
DAC C
3
2.5
2
1.5
1
0.5
0
0.5
1
1.5
2
2.5
3
Temperature (
°
C)
40
25
85
0
25
55
POWER SUPPLY CURRENT
vs TEMPERATURE
I
Q
(mA)
I
CC
I
SS
Data = FFFF
H
(all DACs)
No Load
14
®
DAC7644
TYPICAL PERFORMANCE CURVES: V
SS
= 5V
(CONT)
At T
A
= +25
°
C, V
DD
= V
CC
= +5V, V
SS
= 5V, V
REFH
= +2.5V, V
REFL
= 2.5V, representative unit, unless otherwise specified.
5
4
3
2
1
0
1
2
3
4
5
R
LOAD
(k
)
0.01
0.1
1
10
100
V
OUT
vs R
LOAD
V
OUT
(V)
Source
Sink
Time (2
µ
s/div)
OUTPUT VOLTAGE vs SETTLING TIME
(2.5V to +2.5V)
Output Voltage
+5V
LDAC
0
Large-Signal Settling Time: 1V/div
Small-Signal Settling Time: 2LSB/div
Time (2
µ
s/div)
OUTPUT VOLTAGE vs SETTLING TIME
(+2.5V to 2.5V)
Output Voltage
Large-Signal Settling Time: 1V/div
Small-Signal Settling Time:
2LSB/div
+5V
LDAC
0
2
1.5
1
0.5
0
POSITIVE SUPPLY CURRENT
vs DIGITAL INPUT CODE
I
CC
(mA)
Digital Input Code
0000
H
0200
H
0400
H
0800
H
1000
H
2000
H
4000
H
6000
H
8000
H
A000
H
C000
H
E000
H
FFFF
H
No Load
All DACs
One DAC
15
®
DAC7644
THEORY OF OPERATION
The DAC7644 is a quad voltage output, 16-bit digital-to-
analog converter (DAC). The architecture is an R-2R ladder
configuration with the three MSB's segmented followed by
an operational amplifier that serves as a buffer. Each DAC
has its own R-2R ladder network, segmented MSBs and
output op amp (see Figure 1). The minimum voltage output
(zero-scale) and maximum voltage output (full-scale) are set
by the external voltage references (V
REF
L and V
REF
H, re-
spectively). The digital input is a 16-bit parallel word and
the DAC input registers offer a readback capability. The
converters can be powered from either a single +5V supply
or a dual
±
5V supply. The device offers a reset function
which immediately sets all DAC output voltages and DAC
registers to mid-scale code 8000
H
or to zero-scale, code
0000
H
. See Figures 2 and 3 for the basic operation of the
DAC7644.
FIGURE 1. DAC7644 Architecture.
FIGURE 2. Basic Single-Supply Operation of the DAC7644.
R
2R
2R
2R
2R
2R
2R
2R
2R
2R
V
REF
H
V
OUT
V
OUT
Sense
V
REF
H Sense
V
REF
L
V
REF
L Sense
R
F
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
RSTSEL
RST
LOADDACS
R/W
A1
A0
CS
DGND
NC
NC
NC
NC
V
OUT
A Sense
V
OUT
A
V
REF
L AB Sense
V
REF
L AB
V
REF
H AB
V
REF
H AB Sense
V
OUT
B Sense
V
OUT
B
V
OUT
C Sense
V
OUT
C
V
REF
H CD Sense
V
REF
H CD
V
REF
L CD
V
REF
L CD Sense
V
OUT
D Sense
V
OUT
D
V
SS
AGND
V
CC
V
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
DAC7644
Reset DACs
Data
Bus
Address
Load DAC Registers
READ/WRITE
Chips Select
NC = No Connection
0V to +2.5V
0V to +2.5V
0V to +2.5V
0V to +2.5V
+2.5000V
+2.5000V
+5V
0.1
µ
F
1
µ
F
+
16
®
DAC7644
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
RSTSEL
RST
LOADDACS
R/W
A1
A0
CS
DGND
NC
NC
NC
NC
V
OUT
A Sense
V
OUT
A
V
REF
L AB Sense
V
REF
L AB
V
REF
H AB
V
REF
H AB Sense
V
OUT
B Sense
V
OUT
B
V
OUT
C Sense
V
OUT
C
V
REF
H CD Sense
V
REF
H CD
V
REF
L CD
V
REF
L CD Sense
V
OUT
D Sense
V
OUT
D
V
SS
AGND
V
CC
V
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
DAC7644
Reset DACs
Data
Bus
Address
Load DAC Registers
READ/WRITE
Chips Select
NC = No Connection
2.5V to +2.5V
2.5V
2.5V to +2.5V
2.5V to +2.5V
2.5V to +2.5V
+2.5V
+2.5V
2.5V
+5V
+5V
5V
0.1
µ
F
0.1
µ
F
1.0
µ
F
1.0
µ
F
+
+
FIGURE 3. Basic Dual-Supply Operation of the DAC7644.
ANALOG OUTPUTS
When V
SS
= 5V (dual supply operation), the output ampli-
fier can swing to within 2.25V of the supply rails, guaran-
teed over the 40
°
C to +85
°
C temperature range. With V
SS
= 0V (single-supply operation), and with R
LOAD
also con-
nected to ground, the output can swing to ground. Care must
also be taken when measuring the zero-scale error when V
SS
= 0V. Since the output voltage cannot swing below ground,
the output voltage may not change for the first few digital
input codes (0000
H
, 0001
H
, 0002
H
, etc.) if the output ampli-
fier has a negative offset. At the negative limit of 2mV, the
first specified output starts at code 0040
H
.
Due to the high accuracy of these D/A converters, system
design problems such as grounding and contact resistance
become very important. A 16-bit converter with a 2.5V full-
scale range has a 1LSB value of 38
µ
V. With a load current
of 1mA, series wiring and connector resistance (see Figure
4) of only 40m
(R
W2
) will cause a voltage drop of 40
µ
V.
To understand what this means in terms of a system layout,
the resistivity of a typical 1 ounce copper-clad printed circuit
board is 1/2 m
per square. For a 1mA load, a 10 milli-inch
wide printed circuit conductor 600 milli-inches long will
result in a voltage drop of 30
µ
V.
The DAC7644 offers a force and sense output configuration
for the high open-loop gain output amplifier. This feature
allows the loop around the output amplifier to be closed at
the load (see Figure 4), thus ensuring an accurate output
voltage.
NC
NC
NC
NC
V
OUT
A Sense
V
OUT
A
V
REF
L AB Sense
V
REF
L AB
V
REF
H AB
V
REF
H AB Sense
V
OUT
B Sense
V
OUT
B
48
47
46
45
44
43
42
41
40
39
38
37
DAC7644
R
W1
R
W2
+2.5V
+V
V
OUT
R
W1
R
W2
V
OUT
FIGURE 4. Analog Output Closed-Loop Configuration
(1/2 DAC7644). R
W
represents wiring resis-
tances.
17
®
DAC7644
REFERENCE INPUTS
The reference inputs, V
REF
L and V
REF
H, can be any voltage
between V
SS
+ 2.5V and V
CC
2.5V provided that V
REF
H is
at least 1.25V greater than V
REF
L. The minimum output of
each DAC is equal to V
REF
L
plus a small offset voltage
(essentially, the offset of the output op amp). The maximum
output is equal to V
REF
H plus a similar offset voltage. Note
that V
SS
(the negative power supply) must either be
connected to ground or must be in the range of 4.75V to
5.25V. The voltage on V
SS
sets several bias points within
the converter. If V
SS
is not in one of these two configura-
tions, the bias values may be in error and proper operation
of the device is not guaranteed.
The current into the V
REF
H input and out of V
REF
L depends
on the DAC output voltages and can vary from a few
microamps to approximately 0.5mA. The reference input
appears as a varying load to the reference. If the reference
can sink or source the required current, a reference buffer is
not required. The DAC7644 features a reference drive and
sense connection such that the internal errors caused by the
changing reference current and the circuit impedances can
be minimized. Figures 5 through 12 show different reference
configurations and the effect on the linearity and differential
linearity.
FIGURE 5. Dual Supply Configuration-Buffered References, used for Dual Supply Performance Curves (1/2 DAC7644).
FIGURE 6. Single-Supply Buffered Reference with a Reference Low of 50mV (1/2 DAC7644).
NC
NC
NC
NC
V
OUT
A Sense
V
OUT
A
V
REF
L AB Sense
V
REF
L AB
V
REF
H AB
V
REF
H AB Sense
V
OUT
B Sense
V
OUT
B
48
47
46
45
44
43
42
41
40
39
38
37
DAC7644
500pF
+V
OPA2234
500pF
+2.5V
V
+V
2.5V
V
V
OUT
V
OUT
NC
NC
NC
NC
V
OUT
A Sense
V
OUT
A
V
REF
L AB Sense
V
REF
L AB
V
REF
H AB
V
REF
H AB Sense
V
OUT
B Sense
V
OUT
B
48
47
46
45
44
43
42
41
40
39
38
37
DAC7644
1000pF
2200pF
+V
OPA2350
100
1000pF
2200pF
98k
0.050V
2k
+2.5V
100
+V
V
OUT
V
OUT
NOTE: V
REF
L has been chosen to be 50mV to allow for current sinking voltage
drops across the 100
resistor and the output stage of the buffer op amp.
18
®
DAC7644
2.5
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.5
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
+2.5V
+V
+1.25V
+V
NC
NC
NC
NC
V
OUT
A Sense
V
OUT
A
V
REF
L AB Sense
V
REF
L AB
V
REF
H AB
V
REF
H AB Sense
V
OUT
B Sense
V
OUT
B
48
47
46
45
44
43
42
41
40
39
38
37
DAC7644
1000pF
2200pF
+V
OPA2350
100
1000pF
2200pF
100
V
OUT
V
OUT
FIGURE 9. Single-Supply Buffered Reference with V
REF
L = +1.25V and V
REF
H = +2.5V (1/2 DAC7644).
FIGURE 7. Integral Linearity and Differential Linearity
Error Curves for Figure 6.
FIGURE 8. Integral Linearity and Differential Linearity
Error Curves for Figure 9.
FIGURE 10. Single-Supply Buffered V
REF
H (1/2 DAC7644).
NC
NC
NC
NC
V
OUT
A Sense
V
OUT
A
V
REF
L AB Sense
V
REF
L AB
V
REF
H AB
V
REF
H AB Sense
V
OUT
B Sense
V
OUT
B
48
47
46
45
44
43
42
41
40
39
38
37
DAC7644
+V
1000pF
100
+2.5V
OPA350
+V
V
OUT
V
OUT
2200pF
19
®
DAC7644
3.0
2.5
2.0
1.5
1.0
0.5
0
0.5
1.0
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
FIGURE 11. Linearity and Differential Linearity Error Curves
for Figure 10.
NC
NC
NC
NC
V
OUT
A Sense
V
OUT
A
V
REF
L AB Sense
V
REF
L AB
V
REF
H AB
V
REF
H AB Sense
V
OUT
B Sense
V
OUT
B
48
47
46
45
44
43
42
41
40
39
38
37
DAC7644
+2.5V
+V
V
OUT
V
OUT
FIGURE 12. Low Cost Single-Supply Configuration.
FIGURE 13. Linearity and Differential Linearity Error Curves
for Figure 12.
2.5
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
1.5
1.0
0.5
0
0.5
1.0
1.5
2.0
LE (LSB)
DLE (LSB)
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(DAC A, +25
°
C)
0000
H
2000
H
4000
H
6000
H
8000
H
Digital Input Code
A000
H
C000
H
E000
H
FFFF
H
DIGITAL INTERFACE
Table I shows the basic control logic for the DAC7644. Note
that each internal register is edge triggered and not level
triggered. When the LOADDACS signal is transitioned to
HIGH, the digital word currently in the register is latched.
The first set of registers (the input registers) are triggered via
the A0, A1, R/W, and CS inputs. Only one of these registers
is transparent at any given time.
The double-buffered architecture is designed mainly so each
DAC input register can be written to at any time and then all
DAC voltages updated simultaneously by the rising edge of
LOADDACS. It also allows a DAC input register to be
written to at any point and the DAC voltages to be synchro-
nously changed via a trigger signal connected to
LOADDACS.
INPUT
DAC
A1
A0
R/W
CS
RST
RSTSEL LOADDACS
REGISTER
REGISTER
MODE
DAC
L
L
L
L
H
X
X
Write
Hold
Write Input
A
L
H
L
L
H
X
X
Write
Hold
Write Input
B
H
L
L
L
H
X
X
Write
Hold
Write Input
C
H
H
L
L
H
X
X
Write
Hold
Write Input
D
L
L
H
L
H
X
X
Read
Hold
Read Input
A
L
H
H
L
H
X
X
Read
Hold
Read Input
B
H
L
H
L
H
X
X
Read
Hold
Read Input
C
H
H
H
L
H
X
X
Read
Hold
Read Input
D
X
X
X
H
H
X
Hold
Write
Update
All
X
X
X
H
H
X
H
Hold
Hold
Hold
All
X
X
X
X
L
X
Reset to Zero
Reset to Zero
All
X
X
X
X
H
X
Reset to Midscale
Reset to Midscale
All
TABLE I. DAC7644 Logic Truth Table.
20
®
DAC7644
DIGITAL TIMING
Figure 14 and Table II provide detailed timing for the digital
interface of the DAC7644.
DIGITAL INPUT CODING
The DAC7644 input data is in Straight Binary format. The
output voltage is given by Equation 1.
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
RCS
CS LOW for Read
150
ns
t
RDS
R/W HIGH to CS LOW
10
ns
t
RDH
R/W HIGH after CS HIGH
10
ns
t
DZ
CS HIGH to Data Bus in High Impedance
10
100
ns
t
CSD
CS LOW to Data Bus Valid
100
150
ns
t
WCS
CS LOW for Write
40
ns
t
WS
R/W LOW to CS LOW
0
ns
t
WH
R/W LOW after CS HIGH
10
ns
t
AS
Address Valid to CS LOW
0
ns
t
AH
Address Valid after CS HIGH
10
ns
t
LS
CS LOW to LOADDACS HIGH
30
ns
t
LH
CS LOW after LOADDACS HIGH
100
ns
t
LX
LOADDACS HIGH
100
ns
t
DS
Data Valid to CS LOW
0
ns
t
DH
Data Valid after CS HIGH
10
ns
t
LWD
LOADDACS LOW
100
ns
t
SS
RSTSEL Valid Before RESET HIGH
0
ns
t
SH
RSTSEL Valid After RESET HIGH
200
ns
t
RSS
RESET LOW Before RESET HIGH
10
ns
t
RSH
RESET LOW After RESET HIGH
10
ns
t
S
Settling Time
10
µ
s
TABLE II. Timing Specifications (T
A
= 40
°
C to +85
°
C).
t
RCS
CS
t
RDS
t
RDH
t
AS
t
CSD
t
DZ
t
AH
R/W
A0/A1
Data Out
Data Valid
t
WCS
CS
t
WS
t
AS
t
AH
t
WH
R/W
A0/A1
t
LS
t
LWD
t
LH
t
S
±
0.003% of FSR
Error Band
±
0.003% of FSR
Error Band
t
LX
LOADDACS
t
DS
t
DH
Data In
V
OUT
Data Read Timing
Data Write Timing
t
RSH
RST
V
OUT
,RESET SEL LOW
+FS
FS
t
SS
t
SH
RESET SEL
V
OUT
,RESET SEL HIGH
MS
+FS
FS
DAC7644 Reset Timing
t
RSS
where N is the digital input code. This equation does not
include the effects of offset (zero-scale) or gain (full-scale)
errors.
FIGURE 14. Digital Input and Output Timing.
(1)
V
V
L
V
H
V
L
N
OUT
REF
REF
REF
=
+
(
)
·
,
65 536
21
®
DAC7644
Figure 15 shows a DAC7644 in a 4mA to 20mA current
output configuration. The output current can be determined
by Equation 3:
At full-scale, the output current is 16mA plus the 4mA for
the zero current. At zero scale the output current is the offset
current of 4mA (0.5V/125
).
(2)
(3)
DIGITALLY-PROGRAMMABLE
CURRENT SOURCE
The DAC7644 offers a unique set of features that allows a
wide range of flexibility in designing applications circuits
such as programmable current sources. The DAC7644 offers
both a differential reference input as well as an open-loop
configuration around the output amplifier. The open-loop
configuration around the output amplifier allows transistor
to be placed within the loop to implement a digitally-
programmable, uni-directional current source. The availabil-
ity of a differential reference also allows programmability
for both the full-scale and zero-scale currents. The output
current is calculated as:
NC
NC
NC
NC
V
OUT
A Sense
V
OUT
A
V
REF
L AB Sense
V
REF
L AB
V
REF
H AB
V
REF
H AB Sense
V
OUT
B Sense
V
OUT
B
48
47
46
45
44
43
42
41
40
39
38
37
DAC7644
I
OUT
V
PROGRAMMED
125
80k
+0.5V
20k
+2.5V
+V
I
OUT
V
PROGRAMMED
125
GND
1000pF
2200pF
+V
OPA2350
100
1000pF
2200pF
100
FIGURE 15. 4-to-20mA Digitally Controlled Current Source (1/2 DAC7644).
I
V
H
V
L
R
N Value
V
L R
OUT
REF
REF
SENSE
REF
SENSE
=
+
(
)
·
,
/
65 536
I
V
V
N Value
V
OUT
=
+
2 5
0 5
125
65 536
0 5
125
.
.
·
,
.
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