© 1992 Burr-Brown Corporation
PDS-1147C
Printed in U.S.A. October, 1993
DAC2813
DUAL 12-BIT DIGITAL-TO-ANALOG
CONVERTER (12-bit port interface)
FEATURES
q
COMPLETE WITH REFERENCE AND
OUTPUT AMPLIFIERS
q
12-BIT PORT INTERFACE
q
ANALOG OUTPUT RANGE:
±
10V
q
MONOTONICITY GUARANTEED OVER
TEMPERATURE
q
INTEGRAL LINEARITY
ERROR:
±
1/2LSB max
q
±
12V to
±
15V SUPPLIES
q
28-PIN PLASTIC DIP PACKAGE
DESCRIPTION
DAC2813 is a complete dual 12-bit digital-to-analog
converter with bus interface logic. Each package in-
cludes a precision +10V voltage reference, double-
buffered bus interface including a RESET function
and 12-bit D/A converters with voltage-output opera-
tional amplifiers.
The double-buffered interface consists of a 12-bit
input latch and a D/A latch for each D/A converter. A
RESET control allows the D/A outputs to be asyn-
chronously reset to bipolar zero, a feature useful for
power-up reset, system initialization and recalibration.
DAC2813 output range resistors are internally con-
nected for 20V full scale range. A 0 to 10V range can
be connected using the bipolar offset resistor. Gain
and bipolar offset of each D/A are adjustable with
external trim potentiometers.
DAC2813 is available in one performance grade with
a integral linearity error of 1/2LSB and 12-bit mono-
tonicity guaranteed over temperature. It is packaged in
28-pin 0.6in. wide plastic DIP package and specified
over 40
o
C to +85
o
C.
10V
Reference
V
REF OUT
V
REF IN 1
BPO 1
V
OUT 1
D/A 1
V
REF IN 2
BPO 2
V
OUT 2
D/A 2
DB0
DB11
LSB
MSB
12
DAC2813
12-bit
Latches
®
International Airport Industrial Park · Mailing Address: PO Box 11400, Tucson, AZ 85734 · Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 · Tel: (520) 746-1111 · Twx: 910-952-1111
Internet: http://www.burr-brown.com/ · FAXLine: (800) 548-6133 (US/Canada Only) · Cable: BBRCORP · Telex: 066-6491 · FAX: (520) 889-1510 · Immediate Product Info: (800) 548-6132
®
DAC2813
2
SPECIFICATIONS
ELECTRICAL
At T
A
= +25
o
C, +V
CC
= +12V or +15V, V
CC
= 12V or 15V, unless otherwise noted.
DAC2813AP
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
INPUTS
DIGITAL INPUTS
Over Temperature
Input Code
(1)
Range
Bipolar Offset Binary
Logic Levels
(2)
V
IH
+2
+5.5
(3)
V
V
IL
0
+0.8
V
Logic Input Currents
DB0-DB11, WR, LDAC, RESET,EN
X
I
IH
V
I
= +2.7V
±
20
µ
A
I
IL
V
I
= +0.4V
±
20
µ
A
TRANSFER CHARACTERISTICS
ACCURACY
Linearity Error
±
1/4
±
1/2
LSB
Differential Linearity Error
±
1/2
±
1
LSB
Gain Error
(5,6)
±
0.05
±
0.2
%
Bipolar Zero Error
(5,7)
±
0.05
±
0.2
%FSR
(4)
Power Supply Sensitivity
Of Full Scale +V
CC
±
5
±
20
ppmFSR/%+V
CC
V
CC
±
1
±
10
ppmFSR/%V
CC
DRIFT
Over Specification
Temperature Range
Gain
±
5
±
30
ppm/
°
C
Bipolar Zero Drift
±
5
±
15
ppmFSR/
°
C
Linearity Error over Temperature
±
1/2
±
3/4
LSB
Monotonicity
Guaranteed
DYNAMIC CHARACTERISTICS
SETTLING TIME
(8)
To within
±
0.012%FSR
of Final Value
5k
|| 500pF Load
Full Scale Range Change
20V Range
4.5
6
µ
s
1LSB Output Step
(9)
At Major Carry
2
µ
s
Slew Rate
10
V/
µ
s
Crosstalk
(10)
5k
Loads
0.1
LSB
OUTPUT
Output Voltage Range
±
V
CC
±
11.4V
±
10
V
Output Current
±
5
mA
Output Impedance
0.2
Short Circuit to ACOM Duration
Indefinite
REFERENCE VOLTAGE
Voltage
+9.95
+10.00
+10.05
V
Source Current Available
for External Loads
2
mA
Impedance
0.2
Temperature Coefficient
±
5
±
25
ppm/
°
C
Short Circuit to Common Duration
Indefinite
POWER SUPPLY REQUIREMENTS
Voltage:+V
CC
+11.4
+15
+16.5
V
V
CC
11.4
15
16.5
V
Current:
No Load
±
V
CC
=
±
15V
+V
CC
24
30
mA
V
CC
12
14
mA
Power Dissipation
540
660
mW
Potential at DCOM with
Respect to ACOM
(11)
3
+3
V
TEMPERATURE RANGES
Specification
40
+85
°
C
Storage
60
+100
°
C
Thermal Resistance,
JA
,Plastic DIP
30
°
C/W
NOTES: (1) For Two's Complement Input Coding invert the MSB with an external logic inverter. (2) Digital inputs are TTL and +5V CMOS compatible over the
specification temperature range. (3) Open DATA input lines will be pulled above +5.5V. See discussion under LOGIC INPUT COMPATIBILITY section. (4) FSR means
Full Scale Range. For example, for
±
10V output, FSR = 20V. (5) Adjustable to zero with external trim potentiometer. (6) Specified with 500
connected between
V
REF OUT
and V
REF IN
. (7) Error at input code 800
HEX
. DAC2813 specified with 100
connected betweenV
REF OUT
and V
REF IN
; and with 500
connected between V
REF
OUT
and BPO. (8) Maximum represents the 3
limit. Not 100% tested for this parameter. (9) For the worst-case code change: 7FF
HEX
to 800
HEX
and 800
HEX
to 7FF
HEX
.
(10) Crosstalk is defined as the change in any output as a result of any other output being driven from 10V to +10V at rated output current. (11) The maximum voltage
at which ACOM and DCOM may be separated without affecting accuracy specifications.
3
®
DAC2813
ABSOLUTE MAXIMUM RATINGS
(1)
+V
CC
to ACOM ............................................................................ 0 to +18V
V
CC
to ACOM ............................................................................ 0 to 18V
+V
CC
to V
CC
............................................................................... 0 to +36V
ACOM to DCOM ..................................................................................
±
4V
Digital Inputs to DCOM ........................................................... 1V to +V
CC
External Voltage applied to BPO Resistor .........................................
±
18V
V
REF OUT
.............................................................. Indefinite short to ACOM
V
OUT
............................................................................ Momentary to
±
18V
Lead Temperature, soldering 10s .................................................. +300
o
C
Max Junction Temperature .............................................................. 165
o
C
NOTE: (1) Stresses above those listed under "Absolute Maximum Ratings" may
cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
PACKAGE
DRAWING
TEMPERATURE
PRODUCT
PACKAGE
NUMBER
(1)
RANGE
DAC2813AP
28-Pin DBL Wide DIP
215
40
°
C to +85
°
C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from per-
formance degradation to complete device failure. Burr-Brown
Corporation recommends that all integrated circuits be handled
and stored using appropriate ESD protection methods.
BLOCK DIAGRAM
LSB
DB0
25k
24.9k
BPO 1
V
REF IN 1
12-Bit D/A Converter
12-Bit D/A Latch
24
28
26
1
2
3
4
5
6
7
8
9
10
11
12
MSB
DB11
49.5k
21
+10V
Reference
22
19
20
V
CC
+V
CC
ACOM
V
REF OUT
WR
14
EN
1
16
17
LDAC
13
12-Bit Input Latch
V
OUT 1
0800µA
25k
24.9k
BPO 2
V
REF IN 2
12-Bit D/A Converter
12-Bit D/A Latch
23
27
25
49.5k
15
12-Bit Input Latch
V
OUT 2
0800µA
12
12
18
DCOM
EN
2
RESET
NOTE: RESET does not reset input latches.
®
DAC2813
4
TIMING DIAGRAMS
PIN
NAME
FUNCTION
1
DB11
DATA, MSB, positive true.
2
DB10
DATA
3
DB9
DATA
4
DB8
DATA
5
DB7
DATA
6
DB6
DATA
7
DB5
DATA
8
DB4
DATA
9
DB3
DATA
10
DB2
DATA
11
DB1
DATA
12
DB0
DATA, LSB.
13
RESET
Resets output of all D/As to bipolar-zero. The D/A remains in this state until overwritten an LDAC-WR command. RESET does not
reset the input latch. After powerup and reset, input latches will be in an indeterminant state.
14
WR
Write strobe. Must be low for data transfer to any latch (except RESET).
15
EN2
Enable for 12-bit input data latch of D/A 2. NOTE: This logic path is slower than the WR\ path.
16
EN1
Enable for 12-bit input data latch of D/A 1. NOTE: This logic path is slower than the WR\ path.
17
LDAC
Load DAC enable. Must be low with WR for data transfer to the D/A latch and simultaneous update of both D/A converters.
18
DCOM
Digital common, logic currents return.
19
V
CC
Analog supply input, nominally 12V or 15V referred to ACOM.
20
+V
CC
Analog supply input, nominally +12V or +15V referred to ACOM.
21
V
REF OUT
+10V reference output.
22
ACOM
Analog common, +V
CC
, V
CC
supply return.
23
BPO2
Bipolar offset. Connect to pin 21 (V
REF OUT
) through a 100
resistor or through a 200 potentiometer for Bipolar Offset Adjust for D/A 2.
24
BPO1
Bipolar offset. Connect to pin 21 (V
REF OUT
) through a 100
resistor or through a 200 potentiometer for Bipolar Offset Adjust or D/A 1.
25
V
REF IN
2
Connect to V
REF OUT
through 500
fixed resistor or through a 1k
gain adjustment potentiometer for D/A 2.
26
V
REF IN
1
Connect to V
REF OUT
through 500
fixed resistor or through a 1k
gain adjustment potentiometer for D/A 1.
27
V
OUT
2
D/A 2 analog output.
28
V
OUT
1
D/A 1 analog output.
PIN DESCRIPTIONS
TRUTH TABLE
WR
EN1
EN2
LDAC RESET OPERATION
X
X
X
X
0
Reset both D/A Latches. Does
not reset input latches.
1
X
X
X
1
No Operation
X
1
1
1
1
No Operation
0
1
0
1
1
Load Data into First Rank for D/A 2
0
0
1
1
1
Load Data into First Rank for D/A 1
0
1
1
0
1
Load Second Rank from First
Rank, both D/As
0
0
0
0
1
All Latches Transparent
"X" = Don't Care
> 5ns
> 50ns
> 50ns
(Load first rank from Data Bus: LDAC = 1)
DB11DB0
WR
> 50ns
WRITE CYCLE #1
EN
X
±1/2LSB
Reset
> 50ns
+10V
10V
0V
t
SETTLING
V
OUT
RESET COMMAND (Bipolar Mode)
EN
X
, LDAC, WR = Don't Care
t
SETTLING
±1/2LSB
LDAC
WR
> 50ns
> 50ns
V
OUT
WRITE CYCLE #2
(Load second rank from first rank: EN
X
= 1)
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
5
®
DAC2813
TYPICAL PERFORMANCE CURVES
At T
A
= +25
°
C, V
CC
=
±
15V, unless otherwise noted.
Frequency (Hz)
[Change in FSR]/[Change in Supply Voltage]
1k
10
100
1k
10k
100k
1M
POWER SUPPLY REJECTION vs
POWER SUPPLY RIPPLE FREQUENCY
(ppm of FSR/ %)
100
10
1
0.1
+V
CC
V
CC
12.0
9.6
7.2
4.8
2.4
0
2.4
4.8
7.2
9.6
12.0
Input Current (µA)
2
0
2
4
6
8
Input Voltage (V)
DIGITAL INPUT CURRENTvs INPUT VOLTAGE
DB
0
-DB
11
RESET, LDAC
EN
X
WR
1
0.5
0
0.5
1
60
20
20
60
100
140
Temperature (°C)
CHANGE OF GAIN AND OFFSET ERROR
vs TEMPERATURE
0.8
0.4
0
0.4
0.8
Gain Error
Bipolar
Offset
Unipolar
Offset
Bipolar/Unipolar Offset (%)
(For 10V FSR; Double for 20V FSR)
Gain Error (%)
0.5
0
0.5
000
Input Code (Hexidecimal)
INTEGRAL LINEARITY ERROR
Linearity Error (LSB)
400
800
C00
FFF
15
10
5
0
5
10
15
0
5
10
15
20
25
Time (µs)
± FULL SCALE OUTPUT SWING
V (V)
OUT
WR
V
OUT
WR (V)
+5
0
MAJOR CARRY GLITCH
Time (µs)
V
OUT
(mV)
250
200
150
100
50
0
2
0
2
4
6
8
10
12
14
+10
0
WR (V)
Data =
7FF
H
Data = 800
H
Data = 7FF
H
PDF 
ZIP