Pipeline
A/D
Reference
Ladder
Timing
Circuitry
Error
Correction
Logic
3-State
Outputs
T/H
10-Bit
Digital
Data
CLK
ADS901
LV
DD
OE
Pwrdn
REFB
CM
REFT
IN
ADS901
®
DESCRIPTION
The ADS901 is a high-speed pipelined analog-to-
digital converter that operates from a +3V power
supply. This complete converter includes a wide band-
width track/hold and a 10-bit quantizer. The full scale
input range is set by external references.
The ADS901 employs digital error correction tech-
niques to provide excellent differential linearity for
demanding imaging applications. Its low distortion
and high SNR give the extra margin needed for
telecommunications, video and test instrumentation
applications. The ADS901 is available in a 28-lead
SSOP package.
10-Bit, 20MHz, +3V Supply
ANALOG-TO-DIGITAL CONVERTER
APPLICATIONS
q
BATTERY POWERED EQUIPMENT
q
CAMCORDERS
q
DIGITAL CAMERAS
q
COMPUTER SCANNERS
q
COMMUNICATIONS
FEATURES
q
LOW POWER: 48mW at +3V
q
SUPPLY RANGE: +2.7V to +3.7V
q
ADJUSTABLE FULL SCALE RANGE WITH
EXTERNAL REFERENCES
q
NO MISSING CODES
q
WIDEBAND TRACK/HOLD: 350MHz
q
POWER DOWN: 15mW
q
28-LEAD SSOP PACKAGE
TM
ADS901E
©
1997 Burr-Brown Corporation
PDS-1340C
Printed in U.S.A. June, 1999
International Airport Industrial Park · Mailing Address: PO Box 11400, Tucson, AZ 85734 · Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 · Tel: (520) 746-1111
Twx: 910-952-1111 · Internet: http://www.burr-brown.com/ · Cable: BBRCORP · Telex: 066-6491 · FAX: (520) 889-1510 · Immediate Product Info: (800) 548-6132
2
®
ADS901
SPECIFICATIONS
At T
A
= +25
°
C, V
S
= LV
DD
= +3V, REFB = 1V, REFT = 2V, Specified Input Range = 1V to 2V, Sampling Rate = 20MHz, unless otherwise specified.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
ADS901E
PARAMETER
CONDITIONS
TEMP
MIN
TYP
MAX
UNITS
Resolution
10
Bits
Specified Temperature Range
Ambient Air
40
+85
°
C
ANALOG INPUT
Specified Full Scale Input Range
(1)
1Vp-p
V
Common-Mode Voltage (Midscale)
1.5
V
Analog Input Bias Current
1
µ
A
Input Impedance
1.25 || 5
M
|| pF
DIGITAL INPUT
Logic Family
CMOS Compatible
Convert Command (Start Conversion)
Start Conversion
Rising Edge of Convert Clock
CONVERSION CHARACTERISTICS
Sample Rate
Full
10k
20M
Samples/s
Data Latency
5
Clk Cyc
DYNAMIC CHARACTERISTICS
Differential Linearity Error (Largest Code Error)
f = 500kHz
Full
±
0.8
LSB
f = 9MHz
Full
±
0.9
±
1.0
LSB
No Missing Codes
Full
Guaranteed
Integral Nonlinearity Error, f = 500kHz
Full
±
3.5
LSB
Spurious Free Dynamic Range
(2)
f = 500kHz (1dBFS
(3)
input)
Full
50
dBFS
(3)
f = 9MHz (1dBFS input)
Full
45
49
dBFS
Signal-to-Noise Ratio (SNR)
Referred to Sinewave Input Signal
f = 500kHz (1dBFS input)
Full
53
dB
f = 9MHz (1dBFS input)
Full
48
53
dB
Maximum SNR
Referred to DC Full Scale Input Signal
f = 9MHz (1dBFS input)
62
dB
Signal-to-(Noise + Distortion) (SINAD)
f = 500kHz (1dBFS input)
Full
50
dB
f = 3.58MHz (1dBFS input)
Full
50
dB
f = 9MHz (1dBFS input)
Full
45
49
dB
Effective Number of Bits
(4)
f
IN
= 3.58MHz
8.0
Bits
Differential Gain Error
NTSC, PAL
2.3
%
Differential Phase Error
NTSC, PAL
1.0
degrees
Output Noise
Input Grounded
0.2
LSB rms
Aperture Delay Time
3
ns
Aperture Jitter
7
ps rms
Analog Input Bandwidth
Small Signal
20dBFS Input
350
MHz
Full Power
0dBFS Input
100
MHz
Overvoltage Recovery Time
(5)
2
ns
DIGITAL OUTPUTS
C
L
= 15pF
Logic Family
CMOS Compatible
Logic Coding
Straight Offset Binary
High Output Voltage, V
OH
+2.4
LV
DD
V
Low Output Voltage, V
OL
+0.4
V
3-State Enable Time
OE = L
20
40
ns
3-State Disable Time
OE = H
18
10
ns
Internal Pull-Down to Gnd
50
k
Power-Down Enable Time
Pwrdn = L
133
ns
Power-Down Disable Time
Pwrdn = H
18
ns
Internal Pull-Down to Gnd
50
k
3
®
ADS901
ACCURACY
Gain Error
Full
2.5
%FS
Input Offset
(6)
Full
0.4
%FS
Power Supply Rejection (Gain)
V
S
= +10%
Full
56
dB
Power Supply Rejection (Offset)
Full
68
dB
External REFT Voltage Range
Full
REFB +0.5
2
V
S
0.8
V
External REFB Voltage Range
Full
0.8
1
REFT 0.5
V
Reference Input Resistance
4
k
POWER SUPPLY REQUIREMENTS
Supply Voltage: +V
S
Operating
Full
+2.7
+3.0
+3.7
V
Supply Current: +I
S
Operating
Full
16
mA
Power Dissipation
Operating
Full
49
60
mW
Power Dissipation (Power Down)
Operating
Full
15
mW
Thermal Resistance,
JA
28-Lead SSOP
89
°
C/W
NOTES: (1) The single-ended input range is set by REFB and REFT values. (2) Spurious Free Dynamic Range refers to the magnitude of the largest harmonic. (3)
dBFS is dB relative to full scale. (4) Based on (SINAD - 1.76)/6.02. (5) No "Rollover" of bits. (6) Offset Deviation from Ideal Negative Full Scale.
ADS901E
PARAMETER
CONDITIONS
TEMP
MIN
TYP
MAX
UNITS
SPECIFICATIONS
(CONT)
At T
A
= +25
°
C, V
S
= LV
DD
= +3V, REFB = 1V, REFT = 2V, Specified Input Range = 1V to 2V, Sampling Rate = 20MHz, unless otherwise specified.
+V
S
....................................................................................................... +6V
Logic V
DD
............................................................................................. +6V
Analog Input ............................................................................... +V
S
+0.3V
Logic Input ................................................................................. +V
S
+0.3V
Case Temperature ......................................................................... +100
°
C
Junction Temperature .................................................................... +150
°
C
Storage Temperature ..................................................................... +125
°
C
ABSOLUTE MAXIMUM RATINGS
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE
SPECIFIED
DRAWING
TEMPERATURE
PACKAGE
ORDERING
TRANSPORT
PRODUCT
PACKAGE
NUMBER
(1)
RANGE
MARKING
NUMBER
(2)
MEDIA
ADS901E
28-Lead SSOP
324
40
°
C to +85
°
C
ADS901E
ADS901E
Rail
ADS901E
28-Lead SSOP
324
40
°
C to +85
°
C
ADS901E
ADS901E/1K
Tape and Reel
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are
available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of "ADS901E/1K" will get a single 1000-
piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
4
®
ADS901
5 Clock Cycles
Data Invalid
t
D
t
L
t
H
t
CONV
N5
N4
N3
N2
N1
N
N+1
N+2
Data Out
Clock
Analog In
N
t
2
N+1
N+2
N+3
N+4
N+5
N+6
N+7
t
1
TOP VIEW
SSOP
PIN CONFIGURATION
PIN
DESIGNATOR
DESCRIPTION
1
+V
S
Analog Supply
2
LV
DD
Output Logic Driver Supply Voltage
3
Bit 10
Data Bit 10 (D0) (LSB)
4
Bit 9
Data Bit 9 (D1)
5
Bit 8
Data Bit 8 (D2)
6
Bit 7
Data Bit 7 (D3)
7
Bit 6
Data Bit 6 (D4)
8
Bit 5
Data Bit 5 (D5)
9
Bit 4
Data Bit 4 (D6)
10
Bit 3
Data Bit 3 (D7)
11
Bit 2
Data Bit 2 (D8)
12
Bit 1
Data Bit 1 (D9) (MSB)
13
GND
Analog Ground
14
GND
Analog Ground
15
CLK
Convert Clock Input
16
OE
Output Enable, Active Low
17
Pwrdn
Power Down Pin
18
+V
S
Analog Supply
19
GND
Analog Ground
20
GND
Analog Ground
21
LpBy
Positive Ladder Bypass
22
REFT
Top Reference Input
23
NC
No Connection
24
REFB
Bottom Reference Input
25
LnBy
Negative Ladder Bypass
26
CM
Common-Mode Voltage Output
27
IN
Analog Input
28
+V
S
Analog Supply
PIN DESCRIPTIONS
TIMING DIAGRAM
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
CONV
Convert Clock Period
50
100
µ
s
ns
t
L
Clock Pulse Low
24
25
ns
t
H
Clock Pulse High
24
25
ns
t
D
Aperture Delay
3
ns
t
1
Data Hold Time, C
L
= 0pF
3.9
ns
t
2
New Data Delay Time, C
L
= 15pF max
12
ns
+V
S
LV
DD
(LSB) Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
(MSB) Bit 1
GND
GND
+V
S
IN
CM
LnBy
REFB
NC
REFT
LpBy
GND
GND
+V
S
Pwrdn
OE
CLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ADS901
5
®
ADS901
SPECTRAL PERFORMANCE
Frequency (MHz)
0
20
40
60
80
100
0
2
4
6
8
10
Amplitude (dB)
f
IN
= 9MHz
SPECTRAL PERFORMANCE
Frequency (MHz)
0
20
40
60
80
100
0
2
4
6
8
10
Amplitude (dB)
f
IN
= 500kHz
DIFFERENTIAL LINEARITY ERROR
Output Code
2
1
0
1
2
0
256
512
768
1024
DLE (LSB)
f
IN
= 500kHz
TYPICAL PERFORMANCE CURVES
At T
A
= +25
°
C, V
S
= Logic V
DD
= +3V, REFB = 1V, REFT = 2V, Specified Input Range = 1V to 2V, Sampling Rate = 20MHz, unless otherwise specified.
SPECTRAL PERFORMANCE
Frequency (MHz)
0
20
40
60
80
100
0
2
4
6
8
10
Amplitude (dB)
f
IN
= 3.58MHz
TWO-TONE INTERMODULATION
Frequency (MHz)
0
20
40
60
80
100
0
2.5
5
7.5
10
Amplitude (dB)
f
1
= 4.5MHz
f
2
= 5.0MHz
DIFFERENTIAL LINEARITY ERROR
Output Code
2
1
0
1
2
DLE (LSB)
f
IN
= 9MHz
0
256
512
768
1024
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