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Part Number S3882

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KSI-8008-001
1
S3882
Current Mode PWM Controller
Descriptions
The S3882 is fixed PWM controller for Off-line and DC-DC converter applications. The
internal circuits include UVLO, low start up current circuit, temperature compensated
reference, high gain error amplifier, current sensing comparator, and high current
totempole output for driving a power MOSFET.
Also S3882 provide low start up current below 0.3mA and short shutdown delay
Time typical 100nsec.
S3882 have UVLO threshold of 16V(on) and 10V(off).
.
Features
· Low start up current < 0.3mA
· Operating range up to 500KHz
· Cycle by cycle current limiting
· Under Voltage Lock Out with hysteresis
· Short shutdown delay time ; typical 100nsec
· High current totempole output
· Output swing limiting : 22V
Ordering
Information
Type NO. Marking Package Code
S3882 S3882 SOP-8

Outline Dimensions unit :
mm














S
S
e
e
m
m
i
i
c
c
o
o
n
n
d
d
u
u
c
c
t
t
o
o
r
r
PIN Connections
1. Output / Compensation
2. Voltage feedback. Input
3. Current sense Input
4. Rt/Ct
5. GND
6. Output
7. Vcc
8. Vref
KSI-8008-001
2
S3882

Absolute Maximum Ratings
Ta=25
°C
Characteristic Symbol
Ratings
Unit
Supply Voltage
Vcc
28
V
Output Current
Io
1
A
Analog Inputs
Vi(ana)
-0.3 to 6.3
V
Error Amp. Output Sink current
Isink(EA)
10
mA
Power Dissipation
Pd
1
W

Electrical Characteristics
(Vcc=15V, Rt=10Kohm,Ct=3.3nF, Ta=0to 70, Unless otherwise specified)
Characteristic Symbol
Test
Condition Min.
Typ.
Max.
Unit
1. Reference Section
Output Voltage
Vref
Tj=25, Io=1mA
4.91 5.00 5.09
V
Line Regulation
Vref
12V V
CC
25V
- 6 20 mV
Load Regulation
Vref
1mA I
O
20mA
- 6 25 mV
Output Short Current
Isc
Ta
=25
°C
-180 -100 -
mA
2. Oscillator Section
Initial Accuracy
f
OSC
Tj=25
47 52 57 KHz
Voltage Stability
f /V
12V V
CC
25V
- 0.2 1.0 %
Oscillator Voltage
V
OSC
V
pin4
, peak to peak
1.4
1.7
1.8
V
Discharge Current
I
discharge
Tj=25
°C,
Pin4=2V
7.8 8.3 8.8 mA
3. Error Amp Section
Input Voltage
V
2
V
PIN1
=2.5V
2.42 2.50 2.58
V
Input Bias Current
I
b
-
-2.0
-0.3 -
Open Loop Voltage Gain
A
VO1
2V V
O
4V
65 90 -
Unity Gain Bandwidth
GBW
Tj=25
°C
0.7 1 - MHz
PSRR PSRR1
V
CC
=12V to 25V
60
70
-
Output Sink Current
I
SINK
V
PIN2
=2.7V, V
PIN1
=1.1V 2
6
-
mA
Output Source Current
I
SOURCE
V
PIN2
=2.3V, V
PIN1
=5V
-0.8
-0.5
mA
Output High Voltage
V
OH
V
pin2
=2.3V, R
1
=15 to GN
5 6 - V
Output Low Voltage
V
OL
V
PIN2
=2.3V, R
1
=15 to PIN8
- 0.8 1.1 V
4. Current Sense Section
Gain G
V
-
2.85
3.0
3.15 V/V
Maximum Input Signal
V
i(MaX)
V
PIN 1
=5V 0.9
1.0
1.1
V
PSRR PSRR2
12V V
CC
25V
- 70 -
Input Bias Current
I
bias
-
-10 -2 -
Delay to Output
T
d
V
PIN 3
=0V to 2V
-
100
200
nS
KSI-8008-001
3
S3882


Electrical Characteristics(continued)
(Vcc=15V, Rt=10Kohm, Ct=3.3nF, Ta=0 to 70, Unless otherwise specified)
Characteristic Symbol
Test
Condition Min.
Typ.
Max.
Unit
5. Output Section
Output Low Level1
V
OL1
Isink=20mA
- 0.1 0.4 V
Output Low Level2
V
OL2
Isink=200mA
- 1.5 2.0 V
Output High Level1
V
OH1
Isource=20mA
13.0 13.5 -
V
Output High Level2
V
OH2
Isource=200mA
12.0 13.5 -
V
Rise Time
t
r
Tj=25
°C, C
1
=1nF
- 40
100 nS
Fall Time
t
f
Tj=25
°C, C
1
=1nF
- 40
100 nS
Out Volt. Swing Limit
V
olim
Vcc=27V,
C
1
=1nF
- 22 - V
6. Under Voltage Lockout Section
Start Threshold
V
th
-
15 16 17 V
Min. Operating Voltage
V
tL
After turn on
9
10
11
V
7.PWM Section
Maximum Duty Cycle
D
max
-
94 96 100 %
Minimum Duty Cycle
D
min
-
- - 0 %
8.Total Standby Section
Start-Up Current
I
st
-
-
0.2
0.4
mA
Operating Supply Current
I
CC
V
pin2
=V
pin3
=0V
- 11 17 mA
V
CC
Zener Voltage
V
Z
I
CC
=25mA
- 29 - V
NOTE: Adjust Vcc above the the start threshold before setting at 15V
Block Diagram













1
2
3
4
8
7
5
7
6
5
R
S
+
-
1/3
In t e r n al
Bi as
5V
V r e f
S e t /
Re s e t
LO G IC
Os c i l l at or
29V
22V
1V
1/2 V r e f
Er r or Amp
UV LO
C.S Comp
P W M
LATCH
Vref
Vcc
Vfb
Com
C.S
Rt/Ct
GND
PWR Vc
Output
PWR GND
KSI-8008-001
4




To prevent erratic output behavior which activating
the power switch with extraneous leakage currents,
during under voltage lockout. Output(pin6) should be
shunted to ground with a bleeder resister.
The Vcc comparator upper and lower threshold are
16V/10V. The large hysteresis and low start up
currents makes it ideally suited in off-line converter
application where efficient bootstrap start-up
techniques are required.
The oscillator frequency is programmed by the values
selected for the timing components Rt and Ct. Ct is
charged from 5V, Vref, through resistor Rt to
approximately 2.8V and discharged to 1.2V by an
internal current sink.
During the discharge of Ct, the oscillator generates an
internal blanking pulse and the center input NOR gate high.
This makes output to be in a low state and control the
amount of output dead time.
Error amp output(Pin1) is provided for external loop
compensation and error amp can source or sink up to 0.5mA.
The non-inverting input is internally biased at 2.5V and is
not pinned out. The converter output voltage is typically
divided down and monitored by the inverting input(pin2).
S3882
Information in Using IC
1. Under voltage Lockout
2. Oscillator Waveforms and Maximum Duty Cycle
3. Error AMP Configuration
0.5mA
2
+
-
1
Zf
Zt
2.50V
V in
COMP
O N /O F F C O M M A N D
T O R E S E T O F I C
V c c
V o n - 1 6 V
V o f f - 1 0 V
7
V cc
Icc
<17mA
<1mA
10V
16V
8
Rt
Ct
4
5
LARGE Rt
SMALL Ct
SMALL Rt
LARGE Ct
Vpin4
INTERNAL
CLOCK
INTERNAL
CLOCK
Vpin4
KSI-8008-001
5

A normal operating conditions occurs when the power supply output is overloaded or if output voltage to 1.0V
Therefore the maximum peak switch current is lpk(max)=1.0V/Rs, and under the normal operating conditions the
peak inductor current controlled by the voltage at pin1.



Shutdown of the S3882 can be
accomplished by two methods;
either raise pin3 above 1V or pull
pin1 below a voltage two diodes
drops above ground. Either causes
the output of the PWM method
comparator to be high (refer to
block diagram). The PWM latch is reset dominant so that the output will remain low until the next clock cycle after
the shutdown condition at pins 1 and/or 3 is removed. In one example, an externally latched shutdown may be
accomplished by adding an SCR which turn off, allowing the SCR to reset.
I p e a k =
R (V p i n 1 - 2V b e )
3R x R s
CO MP
ER R O R
A MP
1
3
5
CUR R ENT
S E NS E
C O MP A R A T O R
G ND
CUR R E NT
S ENS E
R s
R
C
2R
R
I V
I
S3882
4. Current Sense Circuit
5. Shutdown Techniques
8
3
V
RE F
I
S E N S E
T O CUR R E NT
S E NS E R ES I S T O R
S HUT
DO W N
4.7K
4.7K
5.00
1
CO MP
S HUT
DO W N