ChipFind - Datasheet

Part Number AT91SAM7S32

Download:  PDF   ZIP

Document Outline

6071A­ATARM­28-Oct-04
Features
·
Incorporates the ARM7TDMI
®
ARM
®
Thumb
®
Processor
­ High-performance 32-bit RISC Architecture
­ High-density 16-bit Instruction Set
­ Leader in MIPS/Watt
­ Embedded ICE In-circuit Emulation, Debug Communication Channel Support
·
32 Kbytes of Internal High-speed Flash, Organized in 256 Pages of 128 Bytes
­ Single Cycle Access at Up to 30 MHz in Worst Case Conditions
­ Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
­ Page Programming Time: 4 ms, Including Page Auto-erase, Full Erase Time: 10 ms
­ 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities,
Security Bit Guaranteeing Code Confidentiality
­ Fast Flash Programming Interface for High Volume Production
·
8 Kbytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed
·
Memory Controller (MC)
­ Embedded Flash Controller, Abort Status and Misalignment Detection
·
Reset Controller (RSTC)
­ Based on Power-on Reset and Low-power Factory-calibrated Brownout Detector
­ Allows External Reset Signal Shaping and Reset Source Status
·
Clock Generator (CKGR)
­ Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
·
Power Management Controller (PMC)
­ Software Power Optimization Capabilities, Including Slow Clock Mode (Down to
500 Hz) and Idle Mode
­ Three Programmable External Clock Signals
·
Advanced Interrupt Controller (AIC)
­ Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
­ One External Interrupt Source and One Fast Interrupt Source, Spurious Interrupt
Protected
·
Debug Unit (DBGU)
­ 2-wire UART and Support for Debug Communication Channel interrupt,
Programmable ICE Access Prevention
·
Periodic Interval Timer (PIT)
­ 20-bit Programmable Counter plus 12-bit Interval Counter
·
Windowed Watchdog (WDT)
­ 12-bit key-protected Programmable Counter
­ Provides Reset or Interrupt Signals to the System
­ Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
·
Real-time Timer (RTT)
­ 32-bit Free-running Counter with Alarm
­ Runs Off the Internal RC Oscillator
·
One Parallel Input/Output Controller (PIOA)
­ Twenty-one Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
­ Input Change Interrupt Capability on Each I/O Line
­ Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
·
Nine Peripheral Data Controller (PDC) Channels
·
One Synchronous Serial Controller (SSC)
­ Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
­ I˛S Analog Interface Support, Time Division Multiplex Support
­ High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
·
One Universal Synchronous/Asynchronous Receiver Transmitters (USART)
­ Individual Baud Rate Generator, IrDA Infrared Modulation/Demodulation
­ Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
·
One Master/Slave Serial Peripheral Interface (SPI)
­ 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
·
One Three-channel 16-bit Timer/Counter (TC)
­ Three External Clock Inputs, Two multi-purpose I/O Pins per Channel
­ Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
AT91 ARM
®
Thumb
®
-based
Microcontrollers
AT91SAM7S32
Preliminary
2
AT91SAM7S32 Preliminary
6071A­ATARM­28-Oct-04
·
One Four-channel 16-bit PWM Controller (PWMC)
·
One Two-wire Interface (TWI)
­ Master Mode Support Only, All Two-wire Atmel EEPROMs Supported
·
One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os
·
IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
·
5V-tolerant I/Os, including Four High-current Drive I/O lines, Up to 16 mA Each
·
Power Supplies
­ Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components
­ 3.3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply
­ 1.8V VDDCORE Core Power Supply with Brownout Detector
·
Fully Static Operation: Up to 55 MHz at 1.65V and 85
°
C Worst Case Conditions
·
Available in a 48-lead LQFP Package
Description
Atmel's AT91SAM7S32 is a member of a series of low pin count Flash microcontrollers
based on the 32-bit ARM RISC processor. It features a 32 Kbyte high-speed Flash and
an 8 Kbyte SRAM, a large set of peripherals and a complete set of system functions
minimizing the number of external components. The device is an ideal migration path for
8-bit microcontroller users looking for additional performance and extended memory.
The embedded Flash memory can be programmed in-system via the JTAG-ICE inter-
face or via a parallel interface on a production programmer prior to mounting. Built-in
lock bits and a security bit protect the firmware from accidental overwrite and preserves
its confidentiality.
The AT91SAM7S32 system controller includes a reset controller capable of managing
the power-on sequence of the microcontroller and the complete system. Correct device
operation can be monitored by a built-in brownout detector and a watchdog running off
an integrated RC oscillator.
The AT91SAM7S32 is a general-purpose microcontroller. Its aggressive price point and
high level of integration pushes its scope of use far into the cost-sensitive, high-volume
consumer market.
3
AT91SAM7S32 Preliminary
6071A­ATARM­28-Oct-04
Block Diagram
Figure 1. AT91SAM7S32 Block Diagram
TDI
TDO
TMS
TCK
NRST
FIQ
IRQ0
PCK0-PCK2
PMC
Peripheral Bridge
Peripheral Data
Controller
AIC
PLL
RCOSC
SRAM
8 Kbytes
ARM7TDMI
Processor
ICE
JTAG
SCAN
JTAGSEL
PIOA
USART
SSC
Timer Counter
RXD0
TXD0
SCK0
RTS0
CTS0
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
Flash
32 Kbytes
Reset
Controller
DRXD
DTXD
TF
TK
TD
RD
RK
RF
TCLK0
TIOA0
TIOB0
TIOA1
TIOB1
Memory Controller
Abort
Status
Address
Decoder
Misalignment
Detection
PIO
PIO
APB
POR
Embedded
Flash
Controller
AD0
AD1
AD2
AD3
ADTRG
PLLRC
9 Channels
PDC
PDC
PDC
PDC
SPI
PDC
ADC
ADVREF
PDC
PDC
TC0
TC1
TC2
TWD
TWCK
TWI
OSC
XIN
XOUT
VDDIN
PWMC
PWM0
PWM1
PWM2
PWM3
1.8 V
Voltage
Regulator
GND
VDDOUT
BOD
VDDCORE
VDDCORE
AD4
AD5
AD6
AD7
VDDFLASH
Fast Flash
Programming
Interface
ERASE
PIO
PGMD0-PGMD7
PGMNCMD
PGMEN0-PGMEN1
PGMRDY
PGMNVALID
PGMNOE
PGMCK
PGMM0-PGMM3
VDDIO
TST
DBGU
PDC
PDC
PIO
PIT
WDT
RTT
System Controller
VDDCORE
4
AT91SAM7S32 Preliminary
6071A­ATARM­28-Oct-04
Signal Description
Table 1 gives details on the signal names classified by peripheral.
Table 1. Signal Description List
Signal Name
Function
Type
Active
Level
Comments
Power
VDDIN
Main Power Supply Input
Power
3.0V to 3.6V
VDDOUT
Voltage Regulator Output
Power
1.85V nominal
VDDFLASH
Flash Power Supply
Power
3.0V to 3.6V
VDDIO
I/O Lines Power Supply
Power
3.0V to 3.6V
VDDCORE
Core Power Supply
Power
1.65V to 1.95V
VDDPLL
PLL
Power
1.65V to 1.95V
GND
Ground
Ground
Clocks, Oscillators and PLLs
XIN
Main Oscillator Input
Input
XOUT
Main Oscillator Output
Output
PLLRC
PLL Filter
Input
PCK0 - PCK2
Programmable Clock Output
Output
ICE and JTAG
TCK
Test Clock
Input
No pull-up resistor
TDI
Test Data In
Input
No pull-up resistor
TDO
Test Data Out
Output
TMS
Test Mode Select
Input
No pull-up resistor
JTAGSEL
JTAG Selection
Input
Pull-down resistor
Flash Memory
ERASE
Flash and NVM Configuration Bits Erase
Command
Input
High
Pull-down resistor
Reset/Test
NRST
Microcontroller Reset
I/O
Low
Pull-Up resistor
TST
Test Mode Select
Input
Pull-down resistor
Debug Unit
DRXD
Debug Receive Data
Input
DTXD
Debug Transmit Data
Output
AIC
IRQ0 External
Interrupt
Input
Input
FIQ
Fast Interrupt Input
Input
PIO
PA0 - PA20
Parallel IO Controller A
I/O
Pulled-up input at reset
USART
5
AT91SAM7S32 Preliminary
6071A­ATARM­28-Oct-04
SCK0
Serial Clock
I/O
TXD0
Transmit Data
I/O
RXD0
Receive Data
Input
RTS0
Request To Send
Output
CTS0
Clear To Send
Input
Synchronous Serial Controller
TD
Transmit Data
Output
RD
Receive Data
Input
TK
Transmit Clock
I/O
RK
Receive Clock
I/O
TF
Transmit Frame Sync
I/O
RF
Receive Frame Sync
I/O
Timer/Counter
TCLK0
External Clock Input
Input
TIOA0 - TIOA1
I/O Line A
I/O
TIOB0 - TIOB1
I/O Line B
I/O
PWM Controller
PWM0 - PWM3
PWM Channels
Output
SPI
MISO
Master In Slave Out
I/O
MOSI
Master Out Slave In
I/O
SPCK
SPI Serial Clock
I/O
NPCS0
SPI Peripheral Chip Select 0
I/O
Low
NPCS1-NPCS3
SPI Peripheral Chip Select 1 to 3
Output
Low
Two-Wire Interface
TWD
Two-wire Serial Data
I/O
TWCK
Two-wire Serial Clock
I/O
Analog-to-Digital Converter
AD0-AD3
Analog Inputs
Analog
Digital pulled-up inputs at reset
AD4-AD7
Analog Inputs
Analog
Analog Inputs
ADTRG
ADC Trigger
Input
ADVREF
ADC Reference
Analog
Fast Flash Programming Interface
PGMEN0-PGMEN1
Programming Enabling
Input
PGMM0-PGMM3
Programming Mode
Input
Table 1. Signal Description List (Continued)
Signal Name
Function
Type
Active
Level
Comments