ChipFind - Datasheet

Part Number AT78C1507

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1
Features
·
Operating Supply Range 3.0V to 3.6V
·
Power Dissipation 1W Max
·
Low-power Sleep Mode (<0.5 mW)
·
RF Data Channel
­ Automatic Gain Control or Programmable Gain Mode
­ Wide Bandwidth VGA
­ VGA Accepts Inputs from 30­300 mV Peak-to-peak Differential (PPD),
60­600 mV
PPD
or 110­1100 mV
PPD
­ Programmable Equalization via 7th-order Equiripple Filter with Programmable
Symmetric Zeros
­ Programmable 5-to-1 Filter Cutoff Range
­ Data Slicer with DC Restore Circuit
­ Wide Frequency Range Clock Extraction
­ Frequency Synthesizer with Independent 7-bit M and 6-bit N Dividers,
Better than 1% Resolution
­ Highly Programmable to Accommodate DVD (1­5X) and CD (6­30X)
­ Write Asymmetry Measurement for Adjusting Write-mode Power
­ Data Recovery Supports CLV, ZCLV, ZCAV Recording
­ Optional Internally-generated Timing for AGC and Timing Recovery
·
Synthesizer Functions
­ Supports Wobble Clock Synthesis, Using Low-jitter PLL
·
Servo Algebra and OPC Functions
­ 45 MHz Bandwidth for Differential Phase Tracking Detector
­ Land and Groove Detector for DVD RAM
­ Supports One Beam Push/Pull Tracking Output
­ Supports One Beam Differential Phase Tracking
­ Supports Three-beam Push/Pull Tracking Output, Using E, F, G, H
­ Focus Error Signal Output
­ Focus OK Signal
­ Track Crossing Detection
­ Mirror Signal Output
­ Wobble Detection for DVD RAM, DVD-RW, DVD-R
­ Detects Tracking Error OK
­ Provides Sample and Hold Functions for CD and DVD OPC
­ Formats Pre-pit Data, Using Raw Pre-pit Information from AT78C1503
·
Header Detection for DVD RAM
Description
The AT78C1503 is a programmable DVD/CD channel responsible for servo algebra, gain con-
trol, equalization, bit detection and clock extraction for CD-ROM, DVD-ROM, DVD-R, DVD-RW
and DVD-RAM formats. Programmable features allow data rates up to 5X DVD. Also, for DVD-
RAM functionality, the channel serves the write path providing laser power control and pit asym-
metry detection. Up to 2X DVD write speeds are supported for DVD-R, DVD-RW and DVD-
RAM. The extracted wobble frequency is supplied to the AT78C1507 companion chip which in
turn synthesizes the write clock.
The AT78C1507 is the companion chip to the AT78C1503 ­ DVD/CD Read Channel ­ and the
AT78C1504 ­ DVD/CD Automatic Laser Power Controller. Working in conjunction with the read
channel, the AT78C1507 is responsible for wobble clock synthesis for DVD-R and DVD-RAM
formats. In addition, the two parts working together also support pre-pit data and clock recovery
for the DVD-R format. Four separate inputs are provided to enable the AT78C1507 to perform
tracking servo algebra, using just the outrigger photo detector signals (E, F, G, H for example)
coming from the OPU. This extends the range of supported tracking servo algebra functions for
the 1503-1507 combination. Lastly, OPC capability is supported for efficient writing of DVD-R,
DVD-RAM and CD-R disks.
Based on CMOS technology, both the AT78C1503 and AT78C1507 operate from a single 3.3V
supply and are fully programmable through serial interfaces for both CD and DVD modes.
DVD/CD Read
Channel
AT78C1503
AT78C1507
Rev. 2054A­DVD­07/02
2
DVD/CD Read Channel
2054A­DVD­07/02
Figure 1. DVD System Block Diagram
Sled
Focus
Spindle
Laser
T08XX
Laser Amp
AT78C1505
Pre-amp
Power
Drivers
DRAM
AT78C1501
ATAPI I/F
Controller
DBM
ECC
SRAM
ARM7TDMI
AT78C1502
Servo
Control
System
Flash
AT78C1503
Read
Channel
AT78C1504
Laser Power
Controller
AT78C1507
Read
Channel Adj.
3
DVD/CD Read Channel
2054A­DVD­07/02
Figure 2. AT78C1503 Block Diagram
VGA
VGA
VGA
VGA
VGA
FREF
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
RCLK
IDFIELD
RDSZ
TOK
TZC
TE
WOBBLE
ID12
ID34
FE
FOK
MIRROR
SLOWSUM
RFDROP
RG
WG
PD
FREQUENCY
SYNTHESIZER
DATA
PLL
DC
RESTORE
MUX
TRACK OK
TRACK
ZERO
CROSS
MUX
58
70
69
68
67
66
65
64
63
62
01
09
48
47
28
44
45
46
27
49
50
29
59
41
77
40
AUTO
INV
VGA
AGC
CONTROL
7th ORDER
FILTER/
EQUALIZER
MUX
SERREG
FCDAC
REG9 <4 0>
BST1 / BST2
REG 8
CAGC
100
(RF Sequencer)
Control
RFGEN
Sum of
Selectable
Buffer
Sum of
Difference
AGC
Control
Voltage
Sum of
Selectable
Buffer
DIFFERENTIAL
TRACKING
DETECTOR
DTR2
Slow Arithmetic
and Normalization
Push/Pull
Tracking
Focus Error
Mirror Detector
Wobble Detector
Land-groove
Detector
16
17
18
19
13
FO1-CD
FO2-CD
TR1-CD
TR2-CD
REXT
VREF
D/SE
D/SE
D/SE
D/SE
`
`
`
`
`
`
TEST
SERIAL
REGISTER
MODE
CONTROL
/
127
P N P N P N P N
TP1
TP2
TP3
TP4
93
92
91
90
93
82
85
84
51
53
52
NA
C
LK
A
TA
AGCLZ
AGCHLD
RFP/N
98
94
2/3
4/5
6/7
8/9
FO1P/N
FO2P/N
TR1P/N
TR2P/N
10/
11
FOCUS OK
4
DVD/CD Read Channel
2054A­DVD­07/02
Figure 3. AT78C1503 Pin-out
Table 1. AT78C1503 Pin List
Pin #
Pin Name
Type
Description
1
IDFIELD
Digital Output
Signal to Preamp to Drive ID Select
2
RFP
Analog Input
High-speed Signal Input
3
RFN
Analog Input
High-speed Signal Input
4
FO1P
Diff Input
Focus 1 Pos
5
FO1N
Diff Input
Focus 1 Neg
6
FO2P
Diff Input
Focus 2 Pos
7
FO2N
Diff Input
Focus 2 Neg
8
TR1P
Diff Input
Track 1 Pos
9
TR1N
Diff Input
Track 1 Neg
10
TR2P
Diff Input
Track 2 Pos
11
TR2N
Diff Input
Track 2 Neg
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
AT78C1503
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
IDFEILD
RFP
RFN
FO1P
FO1N
FO2P
FO2N
TR1P
TR1N
TR2P
TR2N
FOHG
REXT
VDD1
VSS1
FO1_CD
FO2_CD
TR1_CD
TR2_CD
VDD6
SS_H
VSS6
REFFRONT
REFBACK
LENSPOS
CA
CG
RDSZ
A
CGLZ
VDD10
VSS10
A
GCFST
A
GCHLD
TP1P
TP1N
TP2P
TP2N
VSS2
VDD2
CDCRP
CDCRN
TSDDTP2P
TSDDTP2N
TSDDTP1P
TSDDTP1N
TRSIN1P
TRSIN1N
TRSIN2P
TRSIN2N
WG
WCLK
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
TRCST
VDD3
VSS3
VDD11
VSS11
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
RCLK
RFDROP
VDD5
VSS5
FREF
VDD7
VSS7
VDD4
VSS4
SCLK
SDATA
SENA
A
TP1
FE
TE
SLO
WSUM
PORB
VSS8
VDD8
IDSEL
LHIPWR
SHLD
ADCSTR
T
BWUP
BWD
WN
IDINT
PD
RG
VSS9
VDD9
W
OBBLE
ID12
ID34
TZC
TO
K
FOK
MIRR
OR
5
DVD/CD Read Channel
2054A­DVD­07/02
12
FOHG
Digital Input
Focus High Gain
13
REXT
Passive
Passive for 0 TC Current Reference (16.5 K_, 1%)
14
VDD1
3.3V Supply
DPD, IBIAS
15
VSS1
0V Supply
DPD, IBIAS
16
FO1_CD
Analog Input
Focus 1, CD Input
17
FO2_CD
Analog Input
Focus 2, CD Input
18
TR1_CD
Analog Input
Track 1, CD Input
19
TR2_CD
Analog Input
Track 2, CD Input
20
VDD6
3.3V Supply
Slow Servo Analog
21
SS_H
Digital Input
Servo Sample and Hold
22
VSS6
0V Supply
Slow Servo Analog
23
REFFRONT
Input/Output
Servo Front-end Reference Level
24
REFBACK
Input/Output
Servo back-end Reference Level
25
LENSPOS
Analog Input
Lens Position Error Input
26
ATP1
Analog Output
Servo Analog Test Point
27
FE
Analog Output
Focus Error Output
28
TE
Analog Output
Tracking Error Output
29
SLOWSUM
Analog Output
Low-pass Filtered Sum of Photodetector Outputs
30
PORB
Digital Input
Power-on Reset, Bar (active-low)
31
VSS8
0V Supply
Servo DACs
32
VDD8
3.3V Supply
Servo DACs
33
IDSEL
Digital Input
ID Field Select
34
LHIPWR
Digital Input
Laser High Power
35
SHLD
Digital Input
Servo Hold
36
ADCSTRT
Digital Input
Start On-chip 6-bit ADC
37
BWUP
Digital Input
Bandwidth Up
38
BWDN
Digital Input
Bandwidth Down
39
IDINT
Digital Input
Mode Select of Sequencer
40
PD
Digital Input
Power-down
41
RG
Digital Input
User Data Read Gate
42
VSS9
0V Supply
Servo DAC Rings
43
VDD9
3.3V Supply
Servo DAC Rings
44
WOBBLE
Digital Output
Wobble Detect Output
45
ID12
Digital Output
ID Field 12 Detected
46
ID34
Digital Output
ID Field 34 Detected
47
TZC
Digital Output
Track Zero Crossing
Table 1. AT78C1503 Pin List (Continued)
Pin #
Pin Name
Type
Description