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Part Number AT73C211

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Features
·
DC to DC Converter 1.9V / 2.5V (DCDC1)
·
LDO Regulator 2.7V / 2.8V (LDO1)
·
LDO Regulator 2.8V (LDO2)
·
LDO Regulator 2.8V (LDO3)
·
LDO Regulator 2.47V / 2.66 (LDO4) - Backup Battery Supply
·
LDO Regulator 1.72V / 2.66 (LDO5) - RTC Supply
·
Reset Generator
1.
Description
The AT73C211 is a power management device for digital, analog, interface, and, in
some cases, RF and backup sections of add-on modules used as accessories in pop-
ular handheld devices like mobile phones, digital still cameras, PDAs and a wide
range of multimedia devices. The AT73C211 can also be used to supply the CPU with
a high-efficiency DC-DC Converter, a radio frequency transceiver with high power
supply rejection ratio (PSRR) and noise performance low-dropout (LDO) regulators, or
memories and analog sections with independent LDO channels.
In addition, the AT73C211 integrates LDO regulators to recharge backup elements
and convert its voltage to microcontroller RTC supply.
LDO regulators and DC-DC converters output voltage can be programmed by a mask
change.
Power
Management
AT73C211
6199A­PMGMT­20-Sep-05
2
6199A­PMGMT­20-Sep-05
AT73C211
2.
Functional Block Diagram
Figure 2-1.
AT73C211 Block Diagram
RESET
GENERATOR
35ms
VPAD
RESET-B
DGND
VIN
EN
FB
GND
CORE DC/ DC
GND
VCORE
1.9/2.5V / 300 mA
VCORE
GND1
VIN
EN
VOUT
GND
VIN
EN
VOUT
GND
ANALOG LDO
AVCC
AGND
VIN
EN
GND
PAD LDO
VBACK
VBATT
ON/OFF
UP-ON/OFF
VIN-REG1
VIN-REG2
AGND
RTC SUPPLY BLOCK
VPAD
GND
VBATT
2.8V / 80 mA
EN-ANALOG-B
DEEP
DISCHARGED
2.6V
VIN
EN
VOUT
GND
VIB -OUT
VVIB
EN-VIB
GND
GND
LX
V-VIB
2.8V /130 mA
ECO-MODE
LX
AVCC
2.7/ 2.8V / 130 mA
BB1
2.8V
LP
DCDC
GND
LP
VIBRATOR LDO
DGND
BB1
AGND1
GND
GND
EN-ANALOG-B
VBATT
PMC
State
Machine
LS
SPI
POR
10KHz
OSC
Over-Temp
EN
UP-ON/OFF
ON/OFF
ECO-MODE
GND
EN
State Machine Reset
reset
BAT-RTC
2.47 /2.66V
5 mA
VCC-RTC
1.72 /2.66V
0.5mA
VCC-RTC
BAT-RTC
GND
GND
2.7V
BB1
GND
Vref
CREF
AGND
V-PAD
VBATT
CREF
RESET-B
EN
en_vcore
en_vcore
BB1
GND
TEST
en_vpad
VBATT>3.2V
EN
GND
en_vcore
LDO1
LDO2
LDO3
LDO4
LDO5
VBATT
VBATT
V-PAD
3
6199A­PMGMT­20-Sep-05
AT73C211
3.
Pin Description
Table 3-1.
Pin Description
Signal
Pin
Type
A/D
Description
VBATT
E1
VBATT1
Input supply
ON/OFF
D5
IPD
D
Key ON/OFF input, 1.5M Ohm pull-down
UP-ON/OFF
C6
I
D
Hold the Power ON from MCU
RESET-B
F6
OD
D
Reset open collector output. Need external pull-up to VBATT
VIN-REG1
G6
VBATT2
Input supply for DC/DC converter
LX
F7
O
A
DC/DC converter output inductor
ECO-MODE
G5
IPD
D
Eco Mode, from MCU - sets VCORE, V-PAD in low power mode,
1.5M Ohm pull-down
VCORE
G4
O
A
DC/DC converter output (MCU core supply)
GND1
G7
Ground
Ground of DC/DC converter
VIN-REG2
A5
VBATT3
Input supply
EN-ANALOG-B
B5
IPD
D
Enable the analog LDO, active at logic 0, 1.5M Ohm pull-down
AVCC
B4
O
A
Analog LDO output (MCU chip analog supply)
AGND
A7
Ground
Ground of AVCC, V-PAD and RTC LDO
V-PAD
B6
O
A
Digital LDO output (MCU chip digital PAD supply)
VCC-RTC
B7
O
A
MCU RTC supply output
BAT-RTC
A6
I/O
A
RTC backup battery charger - must be connected through a 2.2K
Ohm resistor to the backup battery
VIN-RF
A3
VBATT4
Input supply
AGND2
A2
Ground
Ground
VIN-VIB
D7
VBATT5
Input supply for vibrator LDO
EN-VIB
E6
IPD
D
Vibrator driver input (from baseband chip), 1.5M Ohm pull-down
VVIB
E7
O
A
Vibrator LDO output (Voltage regulator)
GND
D1
Ground
Ground
CREF
C7
O
A
Bandgap decoupling - 100 nF capacitor must be connected from
this pin to ground
BB1
D4
I
D
BB1 = 1 => VCORE = 2.5V, BB1= 0 => VCORE = 1.9V
TEST
E5
IPD
A
Connect to AGND
4
6199A­PMGMT­20-Sep-05
AT73C211
4.
Functional Description
4.1
DC to DC Converter 1.9V/2.5V - 300 mA for Coprocessor Core
The DC-to-DC converter is a synchronous mode DC-to-DC "buck"-switched regulator using
fixed-frequency architecture (PWM) and capable of providing 300 mA of continuous current. It
has two levels of voltage programming for the co-processor core (1.9V or 2.5V). The operating
supply range is from 3.1V to 5.5V, making it suitable for Li-Ion, Li-polymer or Ni-MH battery
applications. The DC-to-DC converter is based on pulse width modulation architecture to con-
trol the noise perturbation for switching noise sensitive applications (Wireless). The operating
frequency is set to 900 kHz using an internal clock, allowing the use of a small surface induc-
tor and moderate output voltage ripple. The controller consists of a reference ramp generator,
a feedback comparator, the logic driver used to drive the internal switches, the feedback cir-
cuits used to manage the different modes of operation and the over-current protection circuits.
An economic mode has been defined to reduce quiescent current. A low-dropout voltage reg-
ulator in parallel to the DC-to-DC converter minimizes standby current consumption during
standby mode.
Figure 4-1.
Dual-power DC-to-DC Converter
Low undershoot voltage is expected when going from PWM to LDO mode and vice-versa. The
circuit is designed in order to avoid any spikes when transition between two modes is enabled.
Figure 4-2.
Low-power/Full-power DC-to-DC Converter Transition
V
BATT
ECO-MODE
DC-to-DC Buck
1.9V or 2.5V
300 mA
Internal FET
LDO
1.9V or 2.5V
10 mA
Low Power
V
CORE
L
C
Low Power
High Power
V
CORE
ECO-MODE
High Power
Low Power
V
CORE
ECO-MODE
5
6199A­PMGMT­20-Sep-05
AT73C211
Figure 4-3
shows typical efficiency levels of the DC-to-DC converter for several input voltages.
Figure 4-3.
DC-to-DC Converter with 1.9V Target Typical Case
(1)
Note:
1. L = 10 µH, ESR = 0.2 Ohm, c = 22 µF, @ESR = 0.1 Ohm
4.2
LDO1, LDO3 Regulators
The PSRR measures the degree of immunity against voltage fluctuations achieved by a regu-
lator. An example of its importance is in the case of a GSM phone when the antenna switch
activates the RF power amplifier (PA). This causes a current peak of up to 2A on the battery,
with an important spike on the battery voltage. The voltage regulator must filter or attenuate
this spike.
70
75
80
85
90
95
100
0
50
100
150
200
250
300
350
400
Load Current (m A)
Efficiency (%)
VIN=3.1V
VIN=3.6V
VIN=4.2V