1
Features
·
AVR
®
8-bit RISC Microcontroller with 41.5 or 83 ns Instruction Cycle Time
·
USB Hub with One Attached and Two External Ports
·
USB Function with Three Programmable End-points
·
24 KB Program Memory, 1 KB Data SRAM
·
32 x 8 General-purpose Working Registers
·
15 Programmable I/O Port Pins
·
12-channel 10-bit ADC
·
One 8-bit Timer/Counter with Separate Pre-scaler
·
One 16-bit Timer/Counter with Separate Pre-scaler and Two PWMs
·
External and Internal Interrupt Sources
·
Programmable Watchdog Timer
·
6 MHz Oscillator with On-chip PLL
·
5V Operation with On-chip 3.3V Power Supply
·
48-lead LQFP Package
Description
The Atmel AT43USB353M is an 8-bit microcontroller based on the AVR RISC archi-
tecture. By executing powerful instructions in a single clock cycle, the AT43USB353M
achieves throughputs approaching 24 MIPS. The AVR core combines a rich instruc-
tion set with 32 general-purpose working registers. All 32 registers are directly
connected to the ALU allowing two independent registers to be accessed in one single
instruction executed in one clock cycle. The resulting architecture is more code effi-
cient while achieving throughputs up to ten times faster than conventional CISC
microcontrollers.
The AT43USB353M features an on-chip 24-Kbyte of masked ROM program memory
and 1-Kbyte of data memory. It is supported by a standard set of peripherals such as
timer/counter modules, watchdog timer and internal and external interrupt sources.
The major peripheral included in the AT43USB353M is a full-speed USB 2.0 Hub with
an embedded function and a 12-channel Analog-to-Digital Converter (ADC) for use in
applications such as game controllers.
The AT43USB353M is binary compatible with the AT43USB355. Program develop-
ment and debugging for the AT43USB353M uses the AT43DK355, including all its
tools and libraries.
Pin Configuration
Figure 1. AT43USB353M 48-lead LQFP
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
PD1
PD0
DP3
DM3
DP2
DM2
DP0
DM0
CEXT1
VCC1
VSS1
PA7
VSSA
CEXTA
VCCA
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ADC8
48
47
46
45
44
43
42
41
40
39
38
37
13
14
15
16
17
18
19
20
21
22
23
24
PA6
PA5
PA4
PA3
PA2
PA1
PA0
RESETN
TEST
ADC11
ADC10
ADC9
PD2
PD3
PD4
PD5
PD6
CPUSEL
VSS2
VCC2
CEXT2
LFT
XTAL2
XTAL1
Low Cost
Full-speed USB
Microcontroller
with Embedded
Hub, ADC and
PWM
AT43USB353M
Rev. 3307AUSB2/03
2
AT43USB353M
3307AUSB2/03
Pin Assignment
Pin#
Signal
Type
Pin#
Signal
Type
1
PD1
Bi-directional
25
ADC8
Input
2
PD0
Bi-directional
26
ADC7
Input
3
DP3
Bi-directional
27
ADC6
Input
4
DM3
Bi-directional
28
ADC5
Input
5
DP2
Bi-directional
29
ADC4
Input
6
DM2
Bi-directional
30
ADC3
Input
7
DP0
Bi-directional
31
ADC2
Input
8
DM0
Bi-directional
32
ADC1
Input
9
CEXT1
Power Supply/Ground
33
ADC0
Input
10
VCC1
Power Supply/Ground
34
VCCA
Power Supply/Ground
11
VSS1
Power Supply/Ground
35
CEXTA
Power Supply/Ground
12
PA7
Bi-directional
36
VSSA
Power Supply/Ground
13
PA6
Bi-directional
37
XTAL1
Input
14
PA5
Bi-directional
38
XTAL2
Output
15
PA4
Bi-directional
39
LFT
Output
16
PA3
Bi-directional
40
CEXT2
Power Supply/Ground
17
PA2
Bi-directional
41
VCC2
Power Supply/Ground
18
PA1
Bi-directional
42
VSS2
Power Supply/Ground
19
PA0
Bi-directional
43
CPUSEL
Input
20
RESETN
Input
44
PD6
Bi-directional
21
TEST
Input
45
PD5
Bi-directional
22
ADC11
Input
46
PD4
Bi-directional
23
ADC10
Input
47
PD3
Bi-directional
24
ADC9
Input
48
PD2
Bi-directional
3
AT43USB353M
3307AUSB2/03
Signal Description
Name
Type
Function
V
CC1
,
2
Power Supply/Ground
5V Digital Power Supply
V
CCA
Power Supply/Ground
5V Power Supply for the ADC
V
SS1
,
2
Power Supply/Ground
Digital Ground
V
SSA
Power Supply/Ground
Ground for the ADC
CEXT1, 2
Power Supply/Ground
External Capacitors for Power Supplies High quality 2.2 µF capacitors must
be connected to CEXT1 and 2 for proper operation of the chip.
CEXTA
Power Supply/Ground
External Capacitor for Analog Power Supply A high quality 0.33 µF capacitor
must be connected to CEXTA for proper operation of the chip.
XTAL1
Input
Oscillator Input Input to the inverting oscillator amplifier.
XTAL2
Output
Oscillator Output Output of the inverting oscillator amplifier.
CPUSEL
Input
CPU Speed Select This pin selects the CPU clock frequency. If high, the CPU
runs at 12 MHz, if low it runs at 24 MHz.
LFT
Input
PLL Filter For proper operation of the PLL, this pin should be connected through
a 0.01 µF capacitor in parallel with a 100
resistor in series with a 0.1 µF capacitor
to ground (VSS). Both capacitors must be high quality ceramic.
DPO
Bi-directional
Upstream Plus USB I/O This pin should be connected to CEXT1 through an
external 1.5 k
.
DMO
Bi-directional
Upstream Minus USB I/O
DP[2,3]
Bi-directional
Downstream Plus USB I/O Each of these pins should be connected to VSS
through an external 15 k
resistor. DP[2,3] and DM[2,3] are the differential signal
pin pairs to connect downstream USB devices.
DM[2,3]
Bi-directional
Downstream Minus USB I/O Each of these pins should be connected to VSS
through an external 15 k
resistor.
PA[0:7]
Bi-directional
Port A[0:7] Bi-directional 8-bit I/O port with 2 mA drive strength and a
programmable pull-up resistor.
PD[0:6]
Bi-directional
Port D[0:6] Bi-directional I/O ports with 2 mA drive strength and a programmable
pull-up resistor. PortD[2,3,5,6] have dual functions as shown below:
Port Pin
Alternate Function
PD2
INT0, External Interrupt 0
PD3
INT1, External Interrupt 1
PD4
ICP, Timer/Counter/Input Capture
PD5
OC1A Timer/Counter1 Output Compare A
PD6
OC1B Timer/Counter1 Output Compare B
ADC[0:11]
Input
ADC Input[0:11] 12-bit input pins for the ADC.
TEST
Input
Test Pin This pin should be tied to ground.
RESETN
Input
Reset Active Low.
4
AT43USB353M
3307AUSB2/03
Figure 2. The AT43USB353M Enhanced RISC Architecture
Architectural
Overview
The AT43USB353M is binary compatible with the AT43USB355. Firmware development for
the AT43USB355 will run on the AT43USB353M as long as only features common to both
chips are used. Refer to Table 3 on page 8 for the differences between these two devices.
The peripherals and features of the AT43USB353M microcontroller are similar to those of the
AT90S8515, with the exception of the following modifications:
·
Masked ROM for program memory
·
No EEPROM
·
No external data memory accesses
·
No SPI
·
No UART
·
Idle mode not supported
·
USB Hub with attached function
·
On-chip ADC
Interrupt
Unit
8-bit
Timer/Counter
16-bit
Timer/Counter
Watchdog
Timer
SPI Unit
ADC
Status and
Control
Program
Counter
12K x 16
Program
Memory
Instruction
Register
Instruction
Decoder
Control
Lines
32 x 8
General-purpose
Registers
ALU
1024 x 8
SRAM
15 GPIO
Lines
USB
Hub and
Function
5
AT43USB353M
3307AUSB2/03
The embedded USB hardware of the AT43USB353M is a compound device, consisting of a 3
port hub with a permanently attached function on one port. The hub and attached function are
two independent USB devices, each having its own device addresses and control end-points.
The hub has its dedicated interrupt end-point, while the USB function has 3 additional pro-
grammable end-points with separate FIFOs. Two of the FIFOs are 64 bytes deep and the third
is 8 bytes deep.
Depending on the state of the CPUSEL input pin, device pin 43, the MCU runs at 12 MHz or
24 MHz. The clock that operates the MCU is generated by the USB hardware. While at
12 MHz the nominal and average period of the clock is 83.3 ns. It may have single cycles that
deviate by ±20.8 ns during a phase adjustment by the SIE's clock/data separator of the USB
hardware. The 24 MHz clock runs with a clock period of 41.67 ns that may increase to 62.5 ns
for one cycle when the SIE's clock/data separator makes an adjustment. The clock frequen-
cies of the various modules of the AT43USB353M is summarized in Table 1.
Note:
Refer to page 15 for details of the on chip oscillator and PLL.
The microcontroller shares most of the control and status registers of the megaAVR Microcon-
troller Family. The registers for managing the USB operations are mapped into its SRAM
space. The I/O section on page 13 summarizes the available I/O registers. The "AVR Register
Set" on page 32 covers the AVR registers. Please refer to the Atmel AVR manual for more
information.
The fast-access register file concept contains 32 x 8-bit general-purpose working registers
with a single clock cycle access time. This means that during one single clock cycle, one Arith-
metic Logic Unit (ALU) operation is executed. Two operands are output from the register file,
the operation is executed, and the result is stored back in the register file in one clock cycle.
Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data
Space addressing - enabling efficient address calculations. One of the three address pointers
is also used as the address pointer for look-up tables in program memory. These added func-
tion registers are the 16-bit X-, Y- and Z-registers.
The ALU supports arithmetic and logic operations between registers or between a constant
and a register. Single register operations are also executed in the ALU. Figure 2 on page 4
shows the AT43USB353M AVR Enhanced RISC microcontroller architecture.
In addition to the register operation, the conventional memory addressing modes can be used
on the register file as well. This is enabled by the fact that the register file is assigned the 32
lowest Data Space addresses ($00 - $1 F), allowing them to be accessed as though they were
ordinary memory locations.
The I/O memory space contains 64 addresses for CPU peripheral functions as Control Regis-
ters, Timer/Counters, and other I/O functions. The I/O Memory can be accessed directly, or as
the Data Space locations following those of the register file, $20 - $5F.
The AVR uses a Harvard architecture concept with separate memories and buses for pro-
gram and data. The program memory is executed with a single-level pipelining. While one
instruction is being executed, the next instruction is pre-fetched from the program memory.
This concept enables instructions to be executed in every clock cycle. The program memory is
a downloadable SRAM or a mask programmed ROM.
Table 1. Module Clock Frequencies
CPUSEL Pin
MCU Clock
Timer/Counter Clock
ADC Clock
WDT Clock
0
24 MHz
12 MHz
1 MHz
1 MHz
1
12 MHz
12 MHz
1 MHz
1 MHz
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