Features

Permanent Software Write Protection for the First-Half of the Array

 Software Procedure to Verify Write Protect Status

Hardware Write Protection for the Entire Array

Low Voltage and Standard Voltage Operation

 5.0 (V

= 4.5V to 5.5V)

 2.7 (V

= 2.7V to 5.5V)

 1.8 (V

= 1.8V to 5.5V)

Internally Organized 256 x 8

2-Wire Serial Interface

Schmitt Trigger, Filtered Inputs for Noise Suppression

Bidirectional Data Transfer Protocol

100 KHz (1.8V and 2.7V) and 400 KHz (5.0V) Compatibility

16-Byte Page Write Modes

Partial Page Writes Are Allowed

Self-Timed Write Cycle (10 ms max)

High Reliability

Endurance: 1 Million Write Cycles
Data Retention: 100 Years
ESD Protection: >3,000V

Automotive Grade and Extended Temperature Devices Available

8-Pin PDIP, 8-Pin JEDEC SOIC and 8-Pin TSSOP Packages

Description

The AT34C02 provides 2048 bits of serial electrically erasable and programmable
read only memory (EEPROM) organized as 256 words of 8 bits each. The first-half of
the device incorporates a software write protection feature while hardware write pro-
tection for the entire array is available via an external pin as well. Once the software
write protection is enabled, by sending a special command to the device, it cannot be
reversed. The hardware write protection is controlled with the WP pin and can be used
to protect the entire array, whether or not the software write protection has been
enabled. This allows the user to protect none, first-half, or all of the array depending
on the application. The device is optimized for use in many industrial and commercial
applications where low power and low voltage operations are essential. The AT34C02
is available in space saving 8-pin PDIP, 8-pin JEDEC SOIC, and 8-pin TSSOP pack-
ages and is accessed via a 2-wire serial interface. In addition, it is available in 5.0V
(4.5V to 5.5V), 2.7V (2.7V to 5.5V), and 1.8V (1.8V to 5.5V) versions.

Rev. 0958D07/98

Pin Configurations

Pin Name

Function

A0 to A2

Address Inputs

SDA

Serial Data

SCL

Serial Clock Input

Write Protect

2-Wire Serial
EEPROM
with Permanent
Software Write
Protect

2K (256 x 8)

AT34C02

8-Pin PDIP

GND

VCC

SCL

SDA

8-Pin SOIC

GND

VCC

SCL

SDA

8-Pin TSSOP

GND

VCC

SCL

SDA

2-Wire Serial
EEPROM with
Permanent
Software Write
Protec

AT34C02

Block Diagram

Pin Description

SERIAL CLOCK (SCL): The SCL input is used to positive
edge clock data into each EEPROM device and negative
edge clock data out of each device.

SERIAL DATA (SDA): The SDA pin is bidirectional for
serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open
collector devices.

DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1
and A0 pins are device address inputs that are hard wired
for the AT34C02. As many as eight 2K devices may be
addressed on a single bus system (device addressing is
discussed in detail under the Device Addressing section).

WRITE PROTECT (WP): The AT34C02 has a Write Pro-
tect pin that provides hardware data protection. The Write
Protect pin allows normal read/write operations when con-

Absolute Maximum Ratings*

Operating Temperature .................................. -55°C to +125 °C

*NOTICE:

Stresses beyond those listed under "Absolute
Maximum Ratings" may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.

Storage Temperature ..................................... -65 °C to +150°C

Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V

Maximum Operating Voltage........................................... 6.25V

DC Output Current........................................................ 5.0 mA

OUT

/ACK

LOGIC

OUT

SDA

GND

SCL

Y DEC

DATA WORD

ADDR/COUNTER

SERIAL

CONTROL

LOGIC

START

STOP

LOGIC

DEVICE

ADDRESS

COMPARATOR

SERIAL MUX

PROM

COMP

INC

LOAD

R/W

H.V. PUMP/TIMING

DATA RECOVERY

X DEC

WRITE PROTECT

CIRCUITRY

SOFTWARE WRITE
PROTECTED AREA

(00H - 7FH)

AT34C02

nected to ground (GND) or when left floating. When the
Write Protect pin is connected to V

, the write protection

feature is enabled for the entire array. The write protection
m o d e s a r e s h o w n i n t h e f o l l o w i n g t a b l e .

Note:

1. This parameter is characterized and is not 100% tested

Note:

1. V

min and V

max are reference only and are not tested.

AT34C02 Write Protection Modes

WP Pin Status

Write Protect Register

Part of the Array Write Protected

Full Array (2K)

GND or Floating

Not Programmed

Normal Read/Write

GND or Floating

Programmed

First-Half of Array

(1K: 00H - 7FH)

Pin Capacitance

(1)

Applicable over recommended operating range from T

= 25

C, f = 1.0 MHz, V

= +1.8V

Symbol

Test Condition

Max

Units

Conditions

I/O

Input/Output Capacitance (SDA)

I/O

= 0V

Input Capacitance (A

, A

, SCL)

= 0V

DC Characteristics

Applicable over recommended operating range from: T

= -40

C to +85

C, V

= +1.8V to +5.5V, T

= 0

C to +70

= +1.8V to +5.5V (unless otherwise noted).

Symbol

Parameter

Test Condition

Min

Typ

Max

Units

CC1

Supply Voltage

1.8

5.5

CC2

Supply Voltage

2.7

5.5

CC3

Supply Voltage

4.5

5.5

Supply Current V

= 5.0V

READ at 100 KHz

0.4

1.0

Supply Current V

= 5.0V

WRITE at 100 KHz

2.0

3.0

SB1

Standby Current V

= 1.8V

= V

or V

0.6

3.0

SB2

Standby Current V

= 2.7V

= V

or V

1.6

4.0

SB3

Standby Current V

= 5.0V

= V

or V

8.0

18.0

Input Leakage Current

= V

or V

0.10

3.0

Output Leakage Current

OUT

= V

or V

0.05

3.0

Input Low Level

(1)

-0.6

x 0.3

Input High Level

(1)

x 0.7

+ 0.5

OL2

Output Low Level V

= 3.0V

= 2.1 mA

0.4

OL1

Output Low Level V

= 1.8V

= 0.15 mA

0.2

AT34C02

Note:

1. This parameter is characterized and is not 100% tested.

Memory Organization

AT34C02, 2K Serial EEPROM: The 2K is internally orga-
nized with 256 pages of 1 byte each. Random word
addressing requires a 8-bit data word address.

Device Operation

CLOCK and DATA TRANSITIONS: The SDA pin is nor-
mally pulled high with an external device. Data on the SDA
pin may change only during SCL low time periods (refer to
Data Validity timing diagram). Data changes during SCL
high periods will indicate a start or stop condition as defined
below.

START CONDITION: A high-to-low transition of SDA with
SCL high is a start condition which must precede any other
command (refer to Start and Stop Definition timing dia-
gram).

STOP CONDITION: A low-to-high transition of SDA with
SCL high is a stop condition. After a read sequence, the

stop command will place the EEPROM in a standby power
mode (refer to Start and Stop Definition timing diagram).

ACKNOWLEDGE: All addresses and data words are seri-
ally transmitted to and from the EEPROM in 8-bit words.
The EEPROM sends a zero to acknowledge that it has
received each word. This happens during the ninth clock
cycle.

STANDBY MODE: The AT34C02 features a low power
standby mode which is enabled: (a) upon power-up or (b)
after the receipt of the STOP bit and the completion of any
internal operations.

MEMORY RESET: After an interruption in protocol, power
loss or system reset, any 2-wire part can be reset by follow-
ing these steps:

(a) Clock up to 9 cycles, (b) look for SDA high in each cycle
while SCL is high and then (c) create a start condition as
SDA is high.

AC Characteristics

Applicable over recommended operating range from T

= -40

C to +85

C, V

= +1.8V to +5.5V,

= 1 TTL Gate and 100 pF (unless otherwise noted).

Symbol

Parameter

1.8V, 2.7V

5.0V

Units

Min

Max

Min

Max

SCL

Clock Frequency, SCL

100

400

kHz

LOW

Clock Pulse Width Low

4.7

1.2

HIGH

Clock Pulse Width High

4.0

0.6

Noise Suppression Time

(1)

100

Clock Low to Data Out Valid

0.1

4.5

0.1

0.9

BUF

Time the bus must be free before a new transmission can start

(1)

4.7

1.2

HD.STA

Start Hold Time

4.0

0.6

SU.STA

Start Set-up Time

4.7

0.6

HD.DAT

Data In Hold Time

SU.DAT

Data In Set-up Time

200

100

Inputs Rise Time

(1)

1.0

0.3

Inputs Fall Time

(1)

300

SU.STO

Stop Set-up Time

4.7

0.6

Data Out Hold Time

100

Write Cycle Time

Endurance

(1)

5.0V, 25

C, Page Mode

Write

Cycles

Part Number AT34C02