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Part Number LP62S16128B-I

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LP62S16128B-I Series
128K X 16 BIT LOW VOLTAGE CMOS SRAM
(August, 2001, Version 1.0)
1
AMIC Technology, Inc.
Features
n
Operating voltage: 2.7V to 3.6V
n
Access times: 55/70 ns (max.)
n
Current:
Very low power version: Operating: 55ns 40mA (max.)
70ns 35mA (max.)
Standby:
10
µ
A (max.)
n
Full static operation, no clock or refreshing required
n
All inputs and outputs are directly TTL-compatible
n
Common I/O using three-state output
n
Data retention voltage: 2V (min.)
n
Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm)
packages
General Description
The LP62S16128B-I is a low operating current 2,097,152-
bit static random access memory organized as 131,072
words by 16 bits and operates on low power voltage from
2.7V to 3.6V. It is built using AMIC's high performance
CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
The chip enable input is provided for POWER-DOWN,
device enable. Two byte enable inputs and an output
enable input are included for easy interfacing.
Data retention is guaranteed at a power supply voltage
as low as 2V.

Pin Configurations
n
n
TSOP
n
n
CSP (Chip Size Package)
48-pin Top View
I/O
9
I/O
10
GND
VCC
I/O
15
I/O
16
NC
A8
NC
A9
A12
A10
A11
NC
A13
A14
A15
I/O
8
I/O
7
I/O
3
I/O
1
GND
VCC
A0
A3
A5
A6
A4
A1
A2
NC
6
5
4
3
2
1
A
B
C
D
E
F
G
H
I/O
14
I/O
13
I/O
12
I/O
11
NC
NC
A7
A16
I/O
2
I/O
4
I/O
5
I/O
6
LB
HB
WE
OE
CE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A3
A2
A1
A0
CE
I/O
1
I/O
2
I/O
3
I/O
4
VCC
GND
I/O
5
I/O
6
I/O
7
I/O
8
WE
A16
A15
A14
A13
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A11
A10
A9
A8
NC
I/O
9
I/O
10
I/O
11
I/O
12
VCC
GND
I/O
13
I/O
14
I/O
15
I/O
16
LB
HB
OE
A7
A6
LP62S16128BV-I
A12
A5
A4
NC
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LP62S16128B-I Series
(August, 2001, Version 1.0)
2
AMIC Technology, Inc.
Block Diagram
DECODER
512 X 4096
MEMORY ARRAY
COLUMN I/O
INPUT
DATA
CIRCUIT
CONTROL
CIRCUIT
VCC
GND
I/O
8
I/O
1
A16
A15
A0
WE
HB
INPUT
DATA
CIRCUIT
I/O
9
I/O
16
LB
OE
CE
Pin Descriptions -- TSOP
Pin No.
Symbol
Description
1 - 5, 18 ­ 22,
24 ­ 27, 42 - 44
A0 - A16
Address Inputs
6
CE
Chip Enable Input
7 - 10, 13 - 16,
29 - 32, 35 - 38
I/O
1
- I/O
16
Data Inputs/Outputs
17
WE
Write Enable Input
39
LB
Lower Byte Enable Input (I/O
1
to I/O
8
)
40
HB
Higher Byte Enable Input (I/O
9
to I/O
16
)
41
OE
Output Enable Input
11, 33
VCC
Power
12, 34
GND
Ground
23, 28
NC
No Connection
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LP62S16128B-I Series
(August, 2001, Version 1.0)
3
AMIC Technology, Inc.
Pin Description - CSP
Symbol
Description
Symbol
Description
A0 - A16
Address Inputs
HB
Higher Byte Enable Input
(I/O
9
- I/O
16
)
CE
Chip Enable
OE
Output Enable
I/O
1
- I/O
16
Data Input/Output
VCC
Power Supply
WE
Write Enable Input
GND
Ground
LB
Byte Enable Input
(I/O
1
- I/O
8
)
NC
No Connection


Recommended DC Operating Conditions
(T
A
= -40
°
C to + 85
°
C)
Symbol
Parameter
Min.
Typ.
Max.
Unit
VCC
Supply Voltage
2.7
3
3.6
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
-
VCC + 0.3
V
V
IL
Input Low Voltage
-0.3
-
+0.6
V
C
L
Output Load
-
-
30
Pf
TTL
Output Load
-
-
1
-
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LP62S16128B-I Series
(August, 2001, Version 1.0)
4
AMIC Technology, Inc.
Absolute Maximum Ratings*

VCC to GND ...............................................-0.5V to +4.6V
IN, IN/OUT Volt to GND .................... -0.5V to VCC + 0.5V
Operating Temperature, Topr ....................-40
°
C to +85
°
C
Storage Temperature, Tstg......................-55
°
C to +125
°
C
Power Dissipation, P
T
............................................... 0.7W

*Comments

Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
DC Electrical Characteristics
(T
A
= -40
°
C to + 85
°
C, VCC = 2.7V to 3.6V, GND = 0V)
Symbol
Parameter
LP62S16128B-55LLI
LP62S16128B-70LLI Unit
Conditions
Min.
Max.
Min.
Max.
I
LI
Input Leakage Current
-
1
-
1
µ
A
V
IN
= GND to VCC
I
LO

Output Leakage
Current
-
1
-
1
µ
A
CE = V
IH
or
LB = HB = V
IH
V
I/O
= GND to VCC
I
CC
Active Power Supply
Current
-
5
-
5
mA
CE = V
IL
,
LB = V
IL
or HB = V
IL ,
I
I/O
= 0 mA
I
CC1
Dynamic Operating
-

40
-
35
mA
Min. Cycle, Duty = 100%
CE = V
IL
,
LB = V
IL
or HB = V
IL ,
I
I/O
= 0 mA
I
CC2
Current
-
15
-
15
mA
CE
0.2V ,
LB
0.2V or HB
0.2V,
f = 1MHz , I
I/O
= 0 mA
I
SB
-
0.5
-
0.5
mA
CE = V
IH
or LB = HB = V
IH
I
SB1
Standby Power
Supply Current
-
10
-
10
µ
A
CE
VCC ­ 0.2V or
LB = HB
VCC ­ 0.2V,
V
IN
VCC ­ 0.2V or V
IN
0.2V
V
OL
Output Low Voltage
-
0.4
-
0.4
V
I
OL
= 2.1 mA
V
OH
Output High Voltage
2.2
-
2.2
-
V
I
OH
= -1.0 mA
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LP62S16128B-I Series
(August, 2001, Version 1.0)
5
AMIC Technology, Inc.
Truth Table
CE
OE
WE
LB
HB
I/O
1
to I/O
8
Mode
I/O
9
to I/O
16
Mode
VCC Current
H
X
X
X
X
Not selected
Not selected
I
SB1
, I
SB
X
X
X
H
H
High-Z
High-Z
I
SB1
, I
SB
L
L
Read
Read
I
CC1
, I
CC2
, I
CC
L
L
H
L
H
Read
High - Z
I
CC1
, I
CC2
, I
CC
H
L
High - Z
Read
I
CC1
, I
CC2
, I
CC
L
L
Write
Write
I
CC1
, I
CC2
, I
CC
L
X
L
L
H
Write
High - Z
I
CC1
, I
CC2
, I
CC
H
L
High - Z
Write
I
CC1
, I
CC2
, I
CC
L
H
H
L
X
High - Z
High - Z
I
CC1
, I
CC2
, I
CC
L
H
H
X
L
High - Z
High - Z
I
CC1
, I
CC2
, I
CC
Note: X = H or L
Capacitance
(T
A
= 25
°
C, f = 1.0MHz)
Symbol
Parameter
Min.
Max.
Unit
Conditions
C
IN
*
Input Capacitance
6
pF
V
IN
= 0V
C
I/O
*
Input/Output Capacitance
8
pF
V
I/O
= 0V
* These parameters are sampled and not 100% tested.