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Part Number AK5352

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ASAHI KASEI
[AK5352]
0155-E-00
1997/1
- 1 -
AK5352
96kHz Sampling
20bit ADC
GENERAL DESCRIPTION
The AK5352 is a 20-bit, 96kHz sampling rate for DAT and DVD, 64x oversampling rate(64fs), 2-channel A/D
converter for stereo digital systems. The
modulator in the AK5352 uses the new developed Enhanced Dual
bit architecture. This new architecture achieves the wider dynamic range, while keeping much the same
superior distortion characteristics as the conventional Single bit way.
The AK5352 is available in a small 24pin VSOP package which will reduce your system space.
FEATURES
Sampling Rate up to 96kHz
Full-differential inputs
S/(N+D): 97dB
DR, S/N: 104dB
Linear phase digital filter
·
Pass band: 0
22kHz(@fs=48kHz)
·
Pass band ripple:
±
0.005dB
·
Stop band attenuation: 80dB
Digital HPF for DC-offset cancel
Master clock: 256fs/384fs
Power supply: 5V
±
5%
Small package: 24pinVSOP
ASAHI KASEI
[AK5352]
0155-E-00
1997/1
- 2 -
Ordering Guide
AK5352-VF -10
70
°
C
24pin VSOP
AKD5351/2 Evaluation Board
Pin Layout
Replacement from AK5350 to AK5352
AK5350
AK5352
Package
28VSOP
24VSOP
*)Interchangeable with AK5352
fc of HPF(@fs=48kHz)
7Hz
1Hz
ASAHI KASEI
[AK5352]
0155-E-00
1997/1
- 3 -
PIN/FUNCTION
No.
Pin Name
I/O
FUNCTION
1
AINR+
I
Right channel analog positive input pin
2
AINR-
I
Right channel analog negative input pin
3
VREF
O
Voltage Reference output pin (VA-2.6V)
Normally connected to VA with a 0.1uF ceramic capacitor in
parallel with a 10uF electrolytic capacitor.
4
VA
-
Analog section Analog Power Supply, +5V
5
AGND
-
Analog section Analog Ground
6
AINL+
I
Left channel analog positive input pin
7
AINL-
I
Left channel analog negative input pin
8
10
11
14
TST1
TST2
TST3
TST4
Test pin (Pull-down pin)
Should be left floating.
9
HPFE
I
High Pass Filter Enable pin (Pull-up pin)
"H": ON
"L": OFF
12
VD
-
Digital section Digital Power Supply pin, +5V
13
DGND
-
Digital section Digital Ground pin
16
PD
I
Power Down pin
"L" brings the device into power-down mode. Must be done
once after power-on.
17
MCLK
I
Master Clock input pin
CMODE="H" : 384fs
CMODE="L" : 256fs
18
SCLK
I/O
Serial Data Clock pin
Data is clocked out at the falling edge of SCLK.
Slave mode: 64fs clock is input usually.
Master mode: SCLK outputs a 64fs clock.
SCLK stays low during the power-down mode(PD="L").
19
LRCK
I/O
L/R Channel Clock Select pin
Slave mode: An fs clock is fed to this LRCK pin.
Master mode: LRCK output an fs clock.
LRCK goes "H" at SMODE2="L" and "L" at SMODE2="H"
during reset when SMODE1 "H".
20
FSYNC
I/O
Frame Synchronization Signal pin
Slave mode: When "H", data bits are clocked out on SDATA.
As I
2
S slave mode ignores FSYNC, it should hold "L" or
"H".
Master mode: FSYNC outputs 2fs clock.
Stay low during the power-down mode(PD="L").
ASAHI KASEI
[AK5352]
0155-E-00
1997/1
- 4 -
21
SDATA
O
Serial Data Output pin
Data are output with MSB first, in 2's complement format.
After 20 bits are output it turns to "L". It also remains "L" at a
power-down mode(PD="L").
22
CMODE
I
Master Clock Selection pin
"L": MCLK=256fs
"H": MCLK=384fs
23
15
SMODE1
SMODE2
I
I
Serial Interface Mode Select pin
Defines the directions of LRCK, SCLK and FSYNC pins and
Output Data Format. SMODE2 is pull-down pin.
SMODE1 SMODE2 MODE LRCK
L
L
Slave mode: MSB justified
: H/L
H
L
Master mode: Similar to I
2
S
: H/L
L
H
Slave mode: I
2
S
: L/H
H
H
Master mode: I
2
S
: L/H
24
VB
-
Substrate Power Supply, +5V
ASAHI KASEI
[AK5352]
0155-E-00
1997/1
- 5 -
ABSOLUTE MAXIMUM RATINGS
(AGND,DGND=0V; Note 1 )
Parameter
Symbol
min
max
Units
DC Power Supply:Analog Power(VA pin)
Digital Power(VD pin) (Note 2 )
Substrate Power(VB pin)
VA
VD
VB
-0.3
-0.3
-0.3
6.0
6.0/VB+0.3
6.0
V
V
Input Current (Any pin except supplies)
IIN
-
±
10
mA
Analog Input Voltage
AINL+,AINL-,AINR+,AINR-pins (Note 2 )
VINA
-0.3
6.0/VA+0.3
V
Digital Input Voltage
(Note 2 )
VIND
-0.3
6.0/VB+0.3
V
Ambient Temperature
Ta
-10
70
°
C
Storage Temperature
Tstg
-65
150
°
C
Note 1 : All voltage with respect to ground.
Note 2 : Absolute maximum value is the highest voltage in 6.0V, VA+0.3V and VB+0.3V.
WARNING: Operation beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMENDED OPERATING CONDITIONS
(AGND,DGND=0V; Note 1 )
Parameter
Symbol
min
typ
max
Units
DC Power Supplies: Analog Power
Digital Power(VD pin)
Substrate Power(VB pin)(Note 3 )
VA
VD
VB
4.75
4.75
4.75
5.0
5.0
5.0
5.25
VB
5.25
V
V
V
Note 1 : All voltages with respect to ground.
Note 3 : The VA and VB are connected together through the chip substrate and have several ohms
resistance. VA and VD must be same voltage.
* AKM assumes no responsibility for the usage beyond the conditions in this data sheet.