ASAHI KASEI
[AK4309B]
0177-E-00
1997/6
- 1 -
AK4309B
16Bit SCF DAC for Multimedia
General Description
The AK4309B is a 1bit stereo DAC for multimedia audio systems. A 1bit DAC can achieve monotonicity and
low distortion with no adjustment and is superior to traditional R-2R ladder based DACs. In the AK4309B, the
loss of accuracy from clock jitter is also improved by using SCF techniques for on-chip post filter. The
AK4309B includes continuous time filter with single end output and does not need any external parts. The
master clock can be either 256fs or 384fs, supporting various audio environment.
Features
Sampling Rate Ranging from 8kHz to 50kHz
On chip Perfect filtering
·
8 times FIR Interpolator
·
2nd order SCF and CTF
·
Total Response:
±
0.5dB at 20kHz
On chip Buffer with Single End Output
Master Clock: 256fs or 384fs
High Tolerance to Clock Jitter
TTL Level Digital Interface
THD+N: -84dB
Dynamic Range: 90dB
Output Level: 3.4Vpp
Power Supply: 5V
±
10%
Low Power Dissipation: 80mW at 5V
Small Package: 20pin SSOP
Pin Compatible with AK4310/4309A
ASAHI KASEI
[AK4309B]
0177-E-00
1997/6
- 2 -
Ordering Guide
AK4309BVM
-10
+70
°
C
20pin SSOP(0.65mm pitch)
AKD4309B
Evaluation Board
(AK4309B's board is the same as AK4310's)
Pin Layout
Compatibility with AK4310/09A
Parameter
AK4310
AK4309A
AK4309B
Power Supply
3
5.5V
4.5
5.5V
4.5
5.5V
Digital I/F level
CMOS
TTL
TTL
DR
92dB
91dB
90dB
Output Voltage
2.8Vpp
3.4Vpp
3.4Vpp
Click Noise
High
Middle
Low
Function of Pin 4
PD
PD
NC
Package
24SSOP
24SSOP
20SSOP
ASAHI KASEI
[AK4309B]
0177-E-00
1997/6
- 3 -
PIN/FUNCTION
No.
Pin Name
I/O
Function
1
TST1
I
Test Pin (Pull-down pin)
Must be left floating or tied to DVSS.
2
DVDD
-
Digital Power Supply Pin
3
DVSS
-
Digital Ground Pin
4
NC
-
No Connection
5
RST
I
Reset Pin
When at "L", the AK4309B is in power-down mode and is held in reset.
The AK4309B should always be reset upon power-up.
6
MCLK
I
Master Clock Input Pin
An external TTL clock should be input on this pin.
The fs is selected by CKS pin.
7
CKS
I
Master Clock Select Pin
"L": MCLK=256fs, "H": MCLK=384fs
8
BICK
I
Serial Bit Input Clock Pin
This clock is used to latch SDATA.
9
SDATA
I
Serial Data Input Pin
2's complement MSB-first data is input on this pin.
10
LRCK
I
L/R Clock Pin
This input determines which channel is currently being input on the Serial
Data Input pin, SDATA. "H": Lch, "L": Rch
11
AOUTR
O
Rch analog output pin
12
AOUTL
O
Lch analog output pin
13
VCOM
O
Common Voltage pin, AVDD/2
Normally connected to AVSS with a 0.1uF ceramic capacitor in parallel with
a 10uF electrolytic cap.
14
AVDD
-
Analog Power Supply Pin
15
AVSS
-
Analog Ground Pin
16
17
NC
NC
-
No Connection
18
VREFH
I
"H" Voltage Reference Input Pin
The differential Voltage between VREFH and VREFL inputs set the analog
output range. The VREFH pin is normally connected to AVDD and the
VREFL pin is connected to AVSS. A 0.1uF ceramic capacitor should be as
near to both pins.
19
VREFL
I
"L" Voltage Reference Input Pin
20
DZF
O
Zero Input Detect Pin
When SDATA of both channels follow a total 8192 LRCK cycles with "0"
input data, this pin goes "H".
* NC pins are not bonded internally.
ASAHI KASEI
[AK4309B]
0177-E-00
1997/6
- 4 -
ABSOLUTE MAXIMUM RATINGS
(AVSS,DVSS=0V; Note 1 )
Parameter
Symbol
min
max
Units
Power Supplies:
Analog
Digital
DVDD-AVDD
AVDD
DVDD
VDA
-0.3
-0.3
-
6.0
6.0
0.3
V
V
V
Input Current, Any Pin Except Supplies
IIN
-
±
10
mA
Input Voltage
VIND
-0.3
AVDD+0.3
V
Ambient Operating Temperature
Ta
-10
70
°
C
Storage Temperature
Tstg
-65
150
°
C
Note: 1 . All voltages with respect to ground.
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMENDED OPERATING CONDITIONS
(AVSS,DVSS=0V; Note 1 )
Parameter
Symbol
min
typ
max
Units
Power Supplies:
Analog (Note 2 )
Digital
AVDD
DVDD
4.5
4.5
5.0
5.0
5.5
AVDD
V
V
Voltage Reference(VREFH) (Note 3 )
VREF
3.0
-
AVDD
V
Notes: 2 . AVDD and DVDD should be powered at the same time or AVDD should be powered earlier than DVDD.
3 . Analog output voltage scales with the voltage of VREFH at VREFL=AVSS.
AOUT(typ.@0dB)=3.4Vpp*VREFH/5.
* AKM assumes no responsibility for the usage beyond the conditions in this data sheet.
ASAHI KASEI
[AK4309B]
0177-E-00
1997/6
- 5 -
ANALOG CHARACTERISTICS
(Ta=25
°
C
; AVDD,DVDD=5.0V; VREFH=AVDD,VREFL=AVSS; fs=44.1kHz; Signal Frequency=1kHz;
Measurement Bandwidth=10Hz
20kHz; R
L
10k
; unless otherwise specified)
Parameter
min
typ
max
Units
Resolution
16
Bits
Dynamic Characteristics (Note 4 )
THD+N
(0dB Output)
-84
-79
dB
Dynamic Range (-60dB Output, A weight)
85
90
dB
S/N
(A weight)
85
90
dB
Interchannel Isolation(1kHz)
80
90
dB
DC Accuracy
Interchannel Gain Mismatch
0.15
0.3
dB
Gain Drift (Note 5 )
60
-
ppm/
°
C
DC Accuracy
Output Voltage (Note 6 )
3.23
3.4
3.57
Vpp
Load Resistance
10
k
Power Supplies
Power Supply Current
Normal Operation ( RST
= "H")
AVDD
DVDD
Power-Down-Mode ( RST = "L")
AVDD+DVDD (Note 7 )
13
3
10
18
5
50
mA
mA
uA
Power Dissipation (AVDD+DVDD)
Normal Operation
Power-Down-Mode (Note 7 )
80
50
115
250
mW
uW
Power Supply Rejection (Note 8 )
50
dB
Notes: 4 . Measured by AD725C(SHIBASOKU). Averaging mode. Refer to the eva board manual.
5 . The voltage on VREFH pin is held +5V externally.
6 . Full-scale voltage(0dB). Output voltage scales with the voltage of VREH-VREFL.
AOUT(typ.@0dB)=3.4Vpp*(VREFH-VREFL)/5.
7 . Power Dissipation in the power-down mode is applied with no external clocks
(MCLK,BICK,LRCK held "H" or "L").
8 . PSR is applied to AVDD,DVDD with 1kHz, 100mVpp. VREF pin is held +5V.
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