eroflex Circuit T
echnology
Data Bus Modules For The Future © SCD1990 REV B 8/21/00
Features
· Performs the Complete Dual-Redundant Remote Terminal, Bus Controller Protocol
and Passive Monitor Functions of MIL-STD-1553B
· Automated Self-Test Functions
· Allows setting of the Message Error Bit on illegal commands
· Provides programmable control over Terminal Flag and Subsystem Flag Status Bits
· MIL-PRF-38534 Compliant Circuits Available
· 50 mw Typical Power Consumption
· Small Size
· Available in Ceramic Plug-in Package Configuration
· Compatible with all ACT Driver/Receiver Units
· 5V DC Operation
· Full Military (-55°C to +125°C) Temperature Range
· DESC SMD# 596294775: Released CT1990, Pending CT1991
1
General Description
The CT1990/1 Series is a monolithic implementation of the MIL-STD-1553B Bus Controller, Remote
Terminal and Passive Monitor functions. All protocol functions of MIL-STD-1553B are incorporated and a
number of options are included to improve flexibility. These features include programming of the status
word, illegalizing specific commands and an independent loop back self-test which is initiated by the
subsystem. This unit is directly compatible with all transceivers and microprocessor interfaces such as the
CT1611 and CT1800 produced by Aeroflex Incorporated.
Encoder
Decoder
"O"
Decoder
"1"
Driver
Select
&
Enable
BUS "0"
BUS "1"
T/R
Hybrid
T/R
Hybrid
Internal
Highway
Control
Interface
Unit
Program
Sub Address
&
Word Count
Outputs
Discrete
Outputs
Control
Inputs
Terminal
Address
Inputs
Block Diagram (With Transformers)
CIRCUIT TECHNOLOGY
CT1990/1
MIL-STD-1553B Remote Terminal, Bus Controller,
or Passive Monitor Hybrid with Status Word Control
CT1990/1 Series
Inputs
Status
Word
Control
Aeroflex Circuit Technology
SCDCT1990 REV B 8/21/00 Plainview NY (516) 694-6700
2
Absolute Maximum Ratings
Parameter
Range
Units
Supply Voltage (V
DD
)
-0.3 to +7.0
V
Input or Output Voltage at any Pad
-0.3 to (V
DD
+ 0.3)
V
Storage Case Temperature
-65 to +150
°C
Recommended DC Operating Conditions
Parameter
Min
Typ
Max
Unit
Notes
Vcc Power Supply Voltage Vcc
4.5
5.0
5.5
V
-
V
IH
High Level Input Voltage, Vcc = 5V
2.2
V
1,2
V
IL
Low Level Input Voltage, Vcc = 5V
0.7
V
1,2
Electrical Characteristics
(T
A
= -55
°
C to +125°C)
Parameter
Test Conditions
Min
Max
Unit
Notes
V
OH
High Level Output Voltage
Vcc = 4.5V
2.4
V
4
V
OL
Low Level Output Voltage
Vcc = 4.5V
0.4
V
4
I
IH
High Level Input Current
Vcc = 5.5V, V
IN
= 2.4V
-200
-25
-700
-400
µA
µA
2
3
I
IL
Low Level Input Current
Vcc = 5.5V, V
IN
= 0.4V
-400
-25
-900
-400
µA
µA
2
3
I
CC
Supply Current
Vcc = 5.5V
20
mA
4
Notes:
1. RTAD 0/1/2/3/4 and RTADPAR ONLY.
2. ALL Inputs and Bidirectionals other than those in Note 1.
3. l
OL
max = 3mA / l
OH
max = -2mA TX INHIBIT 0/1 and TX DATA/DATA ONLY. I
OL
max = 2mA / l
OH
max = -1 mA. ALL
remaining Outputs and Bidirectionals.
4. Input Clock (running) = 6Mhz, ALL remaining Inputs are Open and ALL Outputs and Bidirectionals have no load.
Clock Requirements
Frequency
6.0 MHz
Stability -55°C to +125°C
±0.01% (100ppm)
Maximum Asymmetry
48 - 52%
Rise/Fall Time
10ns MAX
Output Level
Logic "0" 0.4V MAX
Logic "1" 2.4V MIN
Aeroflex Circuit Technology
SCDCT1990 REV B 8/21/00 Plainview NY (516) 694-6700
3
REMOTE TERMINAL OPERATION
Receive Data Operation
All valid data words associated with a valid receive data command word for the RT are passed to the subsystem.
The RT examines all command words from the bus and will respond to valid (i.e. correct Manchester, parity
coding etc.) commands which have the correct RT address (or broadcast address if the RT broadcast option is
enabled). When the data words are received, they are decoded and checked by the RT and, if valid, passed to
the subsystem on a word by word basis at 20 µs intervals. This applies to receive data words in both Bus
Controller to RT and RT to RT messages. When the RT detects that the message has finished, it checks that the
correct number of words have been received and if the message is fully valid, then a Good Block Received
signal is sent to the subsystem, which must be used by the subsystem as permission to use the data just
received.
The subsystem must therefore have a temporary buffer store up to 32 words long into which these data words
can be placed. The Good Block Received signal will allow use of the buffer store data once the message has
been validated.
If a block of data is not validated, then Good Block Received will not be generated. This may be caused by any
sort of message error or by a new valid command for the RT being received on another bus to which the RT
must switch.
Transmit Data Operation
If the RT receives a valid transmit data command addressed to the RT, then the RT will request the data words
from the subsystem for transmission on a word by word basis. To allow maximum time for the subsystem to
collect each data word, the next word is requested by the RT as soon as the transmission of the current word
has commenced.
It is essential that the subsystem should provide all the data words requested by the RT once a transmit
sequence has been accepted. Failure to do so will be classed by the RT as a subsystem failure and reported as
such to the Bus Controller.
Control of Data Transfers
This section describes the detailed operation of the data transfer mechanism between the RT and subsystems.
It covers the operations of the signals DTRQ, DTAK, IUSTB, H/L, GBR, NBGT, TX/RX during receive data and
transmit data transfers.
Figure 7 shows the operation of the data handshaking signals during a receive command with two data words.
When the RT has fully checked the command word, NBGT is pulsed low, which can be used by the subsystem
as an initialization signal. TX/RX will be set low indicating a receive command. When the first data word has
been fully validated, DTRQ is set low. The subsystem must then reply within approximately 1.5 µs by setting
DTAK low. This indicates to the RT that the subsystem is ready to accept data. The data word is then passed to
the subsystem on the internal highway IH08-IH715 in two bytes using IUSTB as a strobe signal and H/L as the
byte indicator (high byte first followed by low byte). Data is valid about both edges of IUSTB. Signal timing for
this handshaking is shown in Figure 12.
If the subsystem does not declare itself busy, then it must respond to DTRQ going low by setting DTAK low
within approximately 1.5 us. Failure to do so will be classed by the RT as a subsystem failure and reported as
such to the Bus Controller.
It should be noted that IUSTB is also used for internal working in the RT. DTRQ being low should be used as an
enable for clocking data to the subsystem with IUSTB.
Once the receive data block has finished and been checked by the RT, GBR is pulsed low if the block is entirely
correct and valid. This is used by the subsystem as permission to make use of the data block. If no GBR signal
is generated, then an error has been detected by the RT and the entire data block is invalid and no data words in
it may be used.
If the RT is receiving data in an RT to RT transfer, the data handshaking signals will operate in an identical
fashion but there will be a delay of approx 70 µs between NBGT going low and DTRQ first going low. See
Figure 10.
Aeroflex Circuit Technology
SCDCT1990 REV B 8/21/00 Plainview NY (516) 694-6700
4
Figure 6 shows the operation of the data handshaking signals during transmit command with three data words.
As with the receive command discussed previously, NBGT is pulsed low if the command is valid and for the RT.
TX/RX will be set high indicating a transmit data command. While the RT is transmitting its status word, it
requests the first data word from the subsystem by setting DTRQ low. The subsystem must then reply within
approximately 13.5 µs by setting DTAK low. By setting DTAK low, the subsystem is indicating that it has the data
word ready to pass to the RT. Once DTAK is set low by the subsystem, DTRQ should be used together with H/L
and TX/RX to enable first the high byte and then the low byte of the data word onto the internal highway
IH08-IH715. The RT will latch the data bytes during IUSTB, and will then return DTRQ high. Data for each byte
must remain stable until IUSTB has returned low. Signal timing for this handshaking is shown in Figure 11.
Additional Data Information Signals
At the same time as data transfers take place, a number of information signals are made available to the
subsystem. These are INCMD, the subaddress lines SA0-SA4, the word count lines WC0-WC4 and current
word count lines CWC0-CWC4. Use of these signals is optional.
INCMD will go active low while the RT is servicing a valid command for the RT. The subaddress,
transmit/receive bit, and word count from the command word are all made available to the subsystem as
SA0-SA4, TX/RX and WC0-WC4 respectively. They may be sampled when INCMD goes low and will remain
valid while INCMD is low.
The subaddress is intended to be used by the subsystem as an address pointer for the data block. Subaddress
0 and 31 are mode commands, and there can be no receive or transmit data blocks associated with these. (Any
data word associated with a mode command uses different handshaking operations. If the subsystem does not
use all the subaddresses available, then some of the subaddress lines may be ignored.
The TX/RX signal indicates the direction of data transfer across the RT - subsystem interface. Its use is
described in the previous section.
The word count tells the subsystem the number of words to expect to receive or transmit in a message, up to 32
words. A word count of all 0s indicates a count of 32 words.
The current word count is set to 0 at the beginning of a new message and is incremented following each data
word transfer across the RT - subsystem interface. (It is clocked on the falling edge of the second IUSTB pulse
in each word transfer). It should be noted that there is no need for the subsystem to compare the word count and
current word count to validate the number of words in a message. This is done by the RT.
Subsystem Use of Status Bits and Mode Commands
General Description
Use of the status bits and the mode commands is one of the most confusing aspects of MIL-STD-1553B. This is
because much of their use is optional, and also because some involve only the RT while others involve both the
RT and the subsystem.
The CT1990/1 allows full use to be made of all the Status Bits, and also implements all the Mode Commands.
External programming of the Terminal Flag and Subsystem Flag Bits plus setting of the Message Error Bit on
reception of an illegal command when externally decoded is available. The subsystem is given the opportunity
to make use of Status Bits, and is only involved in Mode Commands which have a direct impact on the
subsystem.
The mode commands in which the subsystem may be involved are Synchronize, Sychronize with data word,
Transmit Vector Word, Reset and Dynamic Bus Control Acceptance. The Status Bits to which the subsystem
has access, or control are Service Request, Busy, Dynamic Bus Control Acceptance, Terminal Flag, Subsystem
Flag, and Message Error Bit. Operation of each of these Mode Commands and of the Status Bits is described in
the following sections.
All other Mode Commands are serviced internally by the RT. The Terminal Flag and Message Error Status Bits
and BIT Word contents are controlled by the RT; however the subsystem has the option to set the Message
Error Bit and to control the reset conditions for the Terminal Flag and Subsystem Flag Bits in the Status Word,
and the Transmitter Timeout, Subsystem Handshake, and Loop Test Fail Bits in the BIT Word.
Aeroflex Circuit Technology
SCDCT1990 REV B 8/21/00 Plainview NY (516) 694-6700
5
Synchronize Mode Commands
Once the RT has validated the command word and checked for the correct address, the SYNC line is set low.
The signal WC4 will be set low for a Synchronize mode command (See Figure 16), and high for a Synchronize
with data word mode command (See Figure 15). In a Synchronize with data word mode command, SYNC
remains low during the time that the data word is received. Once the data word has been validated, it is passed
to the subsystem on the internal highway IH08-IH715 in two bytes using IUSTB as a strobe signal and H/L as
the byte indicator (high byte first followed by low byte). SYNC being low should be used on the enable to allow
IUSTB to clock synchronize mode data to the subsystem.
If the subsystem does not need to implement either of these mode commands, the SYNC signal can be ignored,
since the RT requires no response from the subsystem.
Transmit Vector Word Mode Command
Figure 14 illustrates the relevant signal timings for an RT receiving a valid Transmit Vector Word mode
command. The RT requests data by setting VECTEN low. The subsystem should use H/L to enable first the high
byte and then the low byte of the Vector word onto the internal highway IH08-IH715.
It should be noted that the RT expects the Vector word contents to be already prepared in a latch ready for
enabling onto the internal highway when VECTEN goes low. If the subsystem has not been designed to handle
the Vector word mode command, it will be the fault of the Bus Controller if the RT receives such a command.
Since the subsystem is not required to acknowledge the mode command, the RT will not be affected in any way
by Vector word circuitry not being implemented in the subsystem. It will however transmit a data word as the
Vector word, but this word will have no meaning.
Reset Mode Command
Figure 8 shows the relevant signal timings for an RT receiving a valid reset mode command. Once the command
word has been fully validated and serviced, the RESET signal is pulsed low. This signal may be used as a reset
function for subsystem interface circuitry.
Dynamic Bus Allocation
This mode command is intended for use with a terminal which has the capability of configuring itself into a bus
controller on command from the bus. The line DBCREQ cannot go true unless the DBCACC line was true at the
time of the valid command, i.e. tied low. For terminals acting only as RTs, the signal DBCACC should be tied
high (inactive), and the signal DBCREQ should be ignored and left unconnected.
Use of the Busy Status Bit
The Busy Bit is used by the subsystem to indicate that it is not ready to handle data transfers either to or from
the RT.
The RT sets the bit to logic one if the BUSY line from the subsystem is active low at the time of the second falling
edge of INCLK after INCMD goes low. This is shown in Figure 13. Once the Busy bit is set, the RT will stop all
receive and transmit data word transfers to and from the subsystem. The data transfers in the Synchronize with
data word and Transmit Vector word mode commands are not affected by the Busy bit and will take place even if
it has been set.
It should be noted that a minimum of 0.5 µs subaddress decoding time is given to the subsystem before setting
of status bits. This allows the subsystem to selectively set the Busy bit if for instance one subaddress is busy but
others are ready. This option will prove useful when an RT is interfacing with multiple subsystems.
Use of the Service Request Status Bit
The Service Request bit is used by the subsystem to indicate to the Bus Controller that an asynchronous
service is requested.
The timing of the setting of this bit is the same as the Busy bit and is shown in Figure 13. Use of SERVREQ has
no effect on the RT apart from setting the Service Request bit.
It should be noted that certain mode commands require that the last status word be transmitted by the RT
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