Document Outline
- FEATURES
- APPLICATIONS
- GENERAL DESCRIPTION
- FUNCTIONAL BLOCK DIAGRAM
- þÿ
- þÿ
- þÿ
- þÿ
- þÿ
- þÿ
- þÿ
- þÿ
18-Channel Gamma Buffer
with Regulator
ADD8708
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
FEATURES
18 precision gamma reference outputs
Mask-programmable gamma resistors:
0.2% resolution and 0.1% accuracy
Mask-programmable voltage regulator: 0.4% accuracy
Upper 9 buffers swing to V
DD
Lower 9 buffers swing to GND
Single-supply operation: 7.5 V to 16.5 V
Gamma current drive: 15 mA per channel
Peak output current: 150 mA
Output voltage stable under load conditions
Pin-to-pin compatible with ADD8709
48-lead, Pb-free LQFP and LFCSP
APPLICATIONS
LCD TV panels
LCD monitor panels
GENERAL DESCRIPTION
The ADD8708 is an 18-channel integrated gamma reference for
use in high resolution LCD TV and monitors panels. The out-
put buffers feature high current drive and low offset voltage to
provide an accurate and stable gamma curve. The top nine
channels swing to V
DD
; the lower nine channels swing to GND.
Integrating the gamma setup resistors drastically reduces the
external component count while increasing the gamma curve
accuracy. To accommodate multiple column drivers and panel
architectures, the ADD8708 is mask programmable to a 0.2%
resolution using the on-chip 500 resistor string. An on-board
voltage regulator provides a fixed input for the resistor string,
isolating the gamma curve from the supply ripple.
The ADD8708 is specified over the temperature range of
40°C to +105°C and comes in both a 48-lead, Pb-free,
lead-frame chip-scale package and a Pb-free, low-profile,
quad flat package.
FUNCTIONAL BLOCK DIAGRAM
04614-001
GND GND
V
DD
V
DD
V
OUT
18
GAMMA
BUFFERS
V
IN
18
GND
1.2V
+
MASK-PROGRAMMABLE
REGULATOR RESISTORS
MASK-PROGRAMMABLE
RESISTOR STRING
V
OUT
17
V
IN
17
V
OUT
16
V
IN
16
V
OUT
15
V
IN
15
V
OUT
14
V
IN
14
V
OUT
13
V
IN
13
V
OUT
12
V
IN
12
V
OUT
11
V
IN
11
V
OUT
10
V
IN
10
V
OUT
9
V
IN
9
V
OUT
8
V
IN
8
V
OUT
7
V
IN
7
V
OUT
6
V
IN
6
V
OUT
5
V
IN
5
V
OUT
4
V
IN
4
V
OUT
3
V
IN
3
V
OUT
2
V
IN
2
V
OUT
1
V
IN
1
FB
V
REG OUT
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
700
*
*ESD PROTECTION RESISTORS
Figure 1. 48-Lead LQFP or LFCSP
ADD8708
Rev. 0 | Page 2 of 16
TABLE OF CONTENTS
Electrical Characteristics ................................................................. 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 7
Application Notes ........................................................................... 10
Tap Point Selection..................................................................... 10
Voltage Regulator ....................................................................... 11
Maximum Power Dissipation ................................................... 11
Land Pattern................................................................................ 11
Operating Temperature Range ................................................. 12
Typical Applications Circuit.......................................................... 14
Tap Point and Regulator Voltage Request Form......................... 15
Outline Dimensions ....................................................................... 16
Ordering Guide........................................................................... 16
REVISION HISTORY
10/04--Revision 0: Initial Version
ADD8708
Rev. 0 | Page 3 of 16
ELECTRICAL CHARACTERISTICS
V
DD
= 16 V, T
A
@ 25°C, unless otherwise noted.
Table 1.
Parameter Symbol
Conditions
Min
Typ
Max
Unit
GAMMA
CURVE
CHARACTERISTICS
Accuracy R
ACC
1
0.1 0.4 %
Programming Resolution
R
RES
500 segments
0.2
%
Total Resistor String
R
TOTAL
15
k
BUFFER
CHARACTERISTICS
OUTPUTS
Output Voltage Range (Ch18 to Ch10)
V
OUT
I
L
= 100 µA
1.4
V
DD
V
Output Voltage Range (Ch9 to Ch1)
V
OUT
I
L
= 100 µA
0
V
DD
- 1.4
V
Output vs. Load (Ch18, Ch17, Ch2, Ch1)
V
OUT
2
I
L
= 20 mA
15
mV
Output vs. Load (Ch16 to Ch3)
V
OUT
2
I
L
= 5 mA
5
mV
INPUTS
Offset Voltage
V
OS
5
15
mV
Offset Voltage Drift
V
OS
/T
-40°C T
A
+105°C
20
µV/°C
Input Bias Current
I
B
-40°C T
A
+105°C
0.5 1.5 µA
Input Voltage Range (Ch18 to Ch10)
V
IN
1.4
V
DD
V
Input Voltage Range (Ch9 to Ch1)
V
IN
0
V
DD
- 1.4
V
DYNAMIC
PERFORMANCE
Slew Rate
SR
R
L
= 10 k, C
L
= 200 pF
4
6
V/µs
Bandwidth
BW
3 dB, R
L
= 10 k, C
L
= 200 pF
4.5
MHz
Settling Time to 0.1%
t
S
1 V, R
L
= 10 k, C
L
= 200 pF
1.1
µs
Phase Margin
o
R
L
= 10 k, C
L
= 200 pF
55
Degrees
Power Supply Rejection Ratio
PSRR
V
DD
= 7 V to 17 V,
-40°C T
A
+105°C
68 90
dB
VOLTAGE
REGULATOR
Programmable Range
V
REG OUT
5
V
DD
- 0.6
V
Initial Regulator Accuracy
V
ACC
No load; V
REG OUT
= 14.4V
0.4
1.5
%
Dropout Voltage
V
DO
I
L
= 100 µA
100
150
mV
I
L
= 5 mA
310
350
mV
Line Regulation
REG
LINE
V
IN
= 8.5 V to 16.5 V, V
OUT
= 8 V
0.01
0.20
%/V
Load Regulation
REG
LOAD
I
O
= 100 µA to 10 mA
0.02
0.10
%/mA
Maximum Load Current
I
O
-40°C T
A
+105°C
5
mA
Feedback Reference Voltage
V
REF
1.2
V
Feedback Input Bias Current
I
B FB
-40°C T
A
+105°C
-150 10 150 nA
SYSTEM
ACCURACY
Total Error
3, 4
V
Total
Error
-40°C T
A
+105°C
0.5
3
%
POWER
SUPPLY
Supply Voltage
V
DD
7.5
16
V
Supply Current
I
SY
No load;
-40°C T
A
+105°C
9.5
16
mA
1
Gamma curve accuracy includes resistor matching and buffer errors, but excludes the regulator error.
2
V
OUT
is the shift from the desired output voltage under the specified current load.
3
Total error is the difference between the designed and actual output voltage divided by the actual regulator output voltage or full-scale voltage.
4
Total error includes regulator error, resistor string error, bias current effects, and buffer offset voltage.
ADD8708
Rev. 0 | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage (V
DD
) 18
V
Input Voltage
-0.5 V to V
DD
Storage Temperature Range
-65°C to +150°C
Operating Temperature Range
1
-40°C to +105°C
Junction Temperature Range
65°C to +150°C
Lead Temperature Range (Soldering, 60 sec)
300°C
ESD Tolerance (HBM)
±1500 V
ESD Tolerance (MM)
±200 V
Table 3. Package Characteristics
Package Type
JA
2
JA
3
Unit
LFCSP (CP)
28.3
47.7
°C/W
LQFP (ST)
N/A
74.57
°C/W
1
See the
section.
Application Notes
2
JA
for exposed pad soldered to JEDEC 4-layer board.
3
JA
for exposed pad not soldered down.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may
affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
ADD8708
Rev. 0 | Page 5 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
04614-002
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
V
OUT
10
V
OUT
9
V
OUT
8
V
OUT
7
V
DD
GND
V
OUT
6
V
OUT
5
V
OUT
4
V
OUT
3
V
OUT
2
V
OUT
1
V
IN
10
V
IN
9
V
IN
8
V
IN
7
V
IN
6
V
IN
5
V
IN
4
V
IN
3
V
IN
2
V
IN
1
GND
V
DD
V
DD
GND
V
OUT
18
V
OUT
17
V
OUT
16
V
OUT
15
V
OUT
14
V
OUT
13
V
DD
GND
V
OUT
12
V
OUT
11
1
2
3
4
5
6
7
8
9
10
11
12
REG
FB
GND
V
DD
V
REG OUT
V
IN
18
V
IN
17
V
IN
16
V
IN
15
V
IN
14
V
IN
13
V
IN
12
V
IN
11
ADD8708
TOP VIEW
(Not to Scale)
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Name
Description
1 REG
FB
Regulator Feedback. Compares a percentage of the regulator output to the internal 1.2 V voltage
reference. Internal resistors are used to program the desired regulator output voltage.
2
GND
Ground. Normally 0 V.
3 V
DD
Supply Voltage. Normally 16 V.
4 V
REG
OUT
Regulator output voltage. Provides reference voltage to resistor string and is internally connected to
the top of the resistor string.
5 V
IN
18
6 V
IN
17
7 V
IN
16
8 V
IN
15
9 V
IN
14
10 V
IN
13
11 V
IN
12
12 V
IN
11
13 V
IN
10
14 V
IN
9
15 V
IN
8
16 V
IN
7
17 V
IN
6
18 V
IN
5
19 V
IN
4
20 V
IN
3
21 V
IN
2
22 V
IN
1
Buffer inputs. Normally floating.
1
23
GND
Ground. Normally 0 V.
24 V
DD
Supply Voltage. Normally 16 V.
1
External resistors can be added to modify the internal resistor string to change the gamma voltage. An external resistor calculator is available upon request from your
local sales office.
ADD8708
Rev. 0 | Page 6 of 16
Pin No.
Name
Description
25 V
OUT
1
26 V
OUT
2
27 V
OUT
3
28 V
OUT
4
29 V
OUT
5
30 V
OUT
6
Buffer Outputs. These buffers can swing to ground.
31
GND
Ground. Normally 0 V.
32 V
DD
Supply voltage. Normally 16 V.
33 V
OUT
7
34 V
OUT
8
35 V
OUT
9
Buffer Output. These buffers can swing to ground.
36 V
OUT
10
37 V
OUT
11
38 V
OUT
12
Buffer Output. These buffers can swing to V
DD
.
39
GND
Ground. Normally 0 V.
40 V
DD
Normally 16 V.
41 V
OUT
13
42 V
OUT
14
43 V
OUT
15
44 V
OUT
16
45 V
OUT
17
46 V
OUT
18
Buffer Outputs. These buffers can swing to V
DD
.
47
GND
Ground. Normally 0 V.
48 V
DD
Supply voltage. Normally 16 V.
ADD8708
Rev. 0 | Page 7 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
20
35
30
25
20
15
10
5
0
5
10
15
20 10 0
10 20 30 40 50 60 70 80 90 100 110 120
04614-003
TEMPERATURE (
°
C)
OUTP
UT V
O
LTAGE
E
RROR (mV
)
I
SINK
= 15mA
I
SINK
= 5mA
I
LOAD
= 0mA
I
SINK
= 25mA
I
SOURCE
= 5mA
I
SOURCE
= 15mA
I
SOURCE
= 25mA
Figure 3. Output Voltage Error vs. Temperature
30
25
20
15
10
5
0
0.1
1
10
100
04614-004
LOAD CURRENT (mA)
OUTP
UT V
O
LTAGE
E
RROR (mV
)
CH17 SINK
CH17 SOURCE
CH18 SOURCE
CH18 SINK
Figure 4. Output Voltage Error vs. Load Current (Channels 17 and 18)
30
25
20
15
10
5
0
0.1
1
10
100
04614-005
LOAD CURRENT (mA)
OUTP
UT V
O
LTAGE
E
RROR (mV
)
CH16 SINK
CH10 SOURCE
CH16 SOURCE
CH10 SINK
Figure 5. Output Voltage Error vs. Load Current (Channels 10 and 16)
25
20
15
10
5
0
0.1
1
10
100
04614-006
LOAD CURRENT (mA)
OUTP
UT V
O
LTAGE
E
RROR (mV
)
CH3 SINK
CH9 SOURCE
CH3 SOURCE
CH9 SINK
Figure 6. Output Voltage Error vs. Load Current (Channels 3 and 9)
25
20
15
10
5
0
0.1
1
10
100
04614-007
LOAD CURRENT (mA)
OUTP
UT V
O
LTAGE
E
RROR (mV
)
CH1 SINK
CH1 SOURCE
CH2 SOURCE
CH2 SINK
Figure 7. Output Voltage Error vs. Load Current (Channels 1 and 2)
11
10
9
8
7
6
5
4
3
2
1
0
200
1800
1600
1400
1200
1000
800
600
400
200
0
04614-008
TIME (ns)
AMP
L
ITUDE
(V
)
10V PULSE
120pF
10nF
1nF
520pF
320pF
Figure 8. Gamma Buffers Transient Load Response vs. Capacitive Loading
ADD8708
Rev. 0 | Page 8 of 16
1000
900
800
700
600
500
400
300
200
100
0
0.30
0.18
0.10
0.02
0.06
0.14
0.22
0.30
04614-009
GAMMA OUTPUT ERROR DUE TO OFFSET AND
RESISTOR MATCHING (% OF FS)
NUMBE
R OF AMP
L
IFIE
RS
Figure 9. Gamma Output Voltage Error
0.3
0.3
0.2
0.1
0
0.1
0.2
0
1
2
3
4
5
6
7
8
9
10
11
12
MAX ERROR EACH STEP
TYPICAL UNIT B
MIN ERROR EACH STEP
TYPICAL UNIT C
TYPICAL UNIT A
04614-010
OUTPUT CHANNEL
E
RROR (%)
Figure 10. Gamma Output Error per Channel (920 Parts)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
17
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
04614-011
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
I
LOAD
= 0mA
I
LOAD
= 5mA
I
LOAD
= 10mA
Figure 11. Dropout Characteristics
0
100
200
300
400
500
600
700
800
900
1000
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
04614-012
OUTPUT CURRENT (mA)
D
R
O
POU
T
VOLTA
GE (
m
V)
Figure 12. Dropout Voltage vs. Output Current
800
750
700
650
600
550
500
450
400
350
300
250
200
150
100
50
0
25 15 5
5
15 25 35 45 55 65 75 85 95 105 115
04614-013
TEMPERATURE (
°
C)
D
R
O
POU
T
VOLTA
GE (
m
V)
10mA
5mA
0mA
Figure 13. Dropout Voltage vs. Temperature
14.5
14.4
14.3
14.2
14.1
14.0
13.9
13.8
13.7
13.6
0
2
4
6
8
10
12
14
16
18
20
04614-014
LOAD CURRENT (mA)
REGULATOR OUTPUT (V)
20
°
C
0
°
C
+25
°
C
+55
°
C
+85
°
C
+95
°
C
+105
°
C
Figure 14. Regulator Output vs. I
LOAD
over Temperature
ADD8708
Rev. 0 | Page 9 of 16
14.45
14.40
14.35
14.30
14.25
14.20
20 10
0
10
20
30
40
50
60
70
80
90 100 110
04712-0-021
TEMPERATURE (
°
C)
REGULATOR OUTPUT (V)
10mA
5mA
0mA
Figure 15. Regulator Output vs. Temperature
04614-016
TIME (100
µ
s/DIV)
IN
PU
T VOLTA
GE (
V
)
OUTP
UT V
O
LTAGE
CHANGE
(mV
)
17
18
15
16
400
200
0
200
400
14
C
LOAD
= 1
µ
F
Figure 16. Regulator Line Transient Response
04614-017
TIME (100
µ
s/DIV)
LOAD CURRE
NT (mA)
OUTP
UT V
O
LTAGE
CHANGE
(mV
)
0.1
40
20
0
20
40
5
C
LOAD
= 1
µ
F
Figure 17. Regulator Load Transient Response
12
0
1
2
3
4
5
6
7
8
9
10
11
0
2
4
6
8
10
12
14
16
18
04614-018
SUPPLY VOLTAGE (V)
S
U
P
P
L
Y
CURRE
NT (mA)
Figure 18. Supply Current vs. Supply Voltage
11.0
10.4
10.5
10.6
10.7
10.8
10.9
20
120
100
80
60
40
20
0
04614-019
TEMPERATURE (
°
C)
S
U
P
P
L
Y
CURRE
NT (mA)
Figure 19. Supply Current vs. Temperature
ADD8708
Rev. 0 | Page 10 of 16
APPLICATION NOTES
The ADD8708 is a mask-programmable gamma reference
generator that allows source drivers to be optimized for the
different combinations of liquid crystals, glass sizes, etc. in
large LCD panels. It generates 18 gamma reference outputs
that can be mask-programmed in 0.2% increments using the
500 matched internal resistors (see Figure 20), so that every
point on the curve can be targeted within 0.1% of the desired
value.
04614-020
TAP POINT 4
TAP POINT 3
TAP POINT 2
TAP POINT 1
TAP POINT 500
TAP POINT 499
TAP POINT 498
TAP POINT 497
EACH R = 30
TYPICALLY
Figure 20. 500 Mask-Programmable Resistor String
In a typical panel application, the selected source drivers have
an internal gamma curve that is not ideal for the specific panel
(see Figure 21). The ADD8708 allows the gamma curve in the
source drivers to be adjusted appropriately, and also ensures
that all the source drivers have the same gamma curve.
16
14
12
10
PANEL GAMMA CURVE
CORRECTED BY ADD8708
ORIGINAL GAMMA CURVE
IN SOURCE DRIVERS
8
6
4
2
0
04614-021
GAMMA REFERENCE INPUT POINTS
GAM
M
A
VOLTAGE (
V
)
Figure 21. Original and Corrected Gamma Curves
The matching and tracking accuracy of the internal resistors is
typically 0.1% with worst-case deviation from the desired curve
within 0.4% of the ideal gamma curve, over temperature.
The ADD8708 also includes a low-dropout linear regulator to
provide a stable reference level for the gamma curve for
optimum panel performance.
TAP POINT SELECTION
The ADD8708 uses a single resistor string consisting of 500
individual elements. The tap points are mask programmable
and completely independent of each other. See the Tap Point
and Regulator Voltage Request Form in this data sheet.
04614-022
V
REG OUT
V
OUT
X
V
IN
X
500TP
X
TP
X
Figure 22. Gamma Buffers Tap Point Circuit
Tap point voltages can be derived from the following equation:
OUT
REG
X
OUT
V
TP
X
V
×
=
500
where TP
X
is the desired tap point for the X
th
channel.
Table 5. Typical Mask Implementation
1
V
DD
= 16 V, V
REG OUT
= 14.4 V, 0 X 500
Tap Point (X)
Voltage
Units
V
OUT
18 500
14.400
V
V
OUT
17 396
11.405
V
V
OUT
16 369
10.627
V
V
OUT
15 361
10.397
V
V
OUT
14 354
10.195
V
V
OUT
13 350
10.080
V
V
OUT
12 341
9.821
V
V
OUT
11 317
9.130
V
V
OUT
10 299
8.611
V
V
OUT
9 225
6.480
V
V
OUT
8 211
6.077
V
V
OUT
7 177
5.098
V
V
OUT
6 167
4.810
V
V
OUT
5 163
4.694
V
V
OUT
4 154
4.435
V
V
OUT
3 146
4.205
V
V
OUT
2 118
3.398
V
V
OUT
1 7
0.202
V
_______________________________
1
ADD8708 release samples do not have these typical values. The values on the
samples are nonmonotonic and can be provided upon request.
ADD8708
Rev. 0 | Page 11 of 16
VOLTAGE REGULATOR
The on-board voltage regulator provides a regulated voltage to
the resistor chain to provide stable gamma voltages.
The two mask-programmable internal resistors, R
1
and R
2
,
and a reference voltage set the output of the regulator. The
typical values of these parts are shown in Figure 23. In addition,
see the Tap Point and Regulator Voltage Request Form in this
data sheet.
04614-023
V
REF
1.2V
+
R
2
55k
R
1
5k
V
REG OUT
Figure 23. Voltage Regulator
The internal resistors have a typical accuracy of 0.1%. External
resistors can be used to adjust the regulator voltage; however, it
is not recommended. Please contact your local sales office for
further details.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADD8708 package
is limited by the associated rise in junction temperature (T
J
) on
the die. At approximately 150°C, the glass transition tempera-
ture, the properties of the plastic change. Even temporarily
exceeding this temperature limit may change the stresses that
the package exerts on the die, permanently shifting the para-
metric performance of the ADD8708. Exceeding a junction
temperature of 175°C for an extended period can result in
changes in the silicon devices, potentially causing failure.
LAND PATTERN
The LFCSP package comes with a thermal pad. Soldering down
this thermal pad dramatically improves the heat dissipation of
the package. It is necessary to attach vias that connect the
soldered thermal pad to another layer on the board. This
provides an avenue to dissipate the heat away from the part.
Without vias, the heat is isolated directly under the part.
Subdivide the solder paste, or stencil layer, for the thermal pad
to reduce solder balling and splatter. It is not critical how the
subdivisions are arranged, as long as the total coverage of the
solder paste for the thermal pad is greater than 50%. The land
pattern is critical to heat dissipation. A suggested land pattern is
shown in Figure 22.
The thermal pad is attached to the substrate. In the ADD8708,
the substrate is connected to V
DD
. To be electrically safe, the
thermal pad should be soldered to an area on the board that is
electrically isolated or connected to V
DD
. Attaching the thermal
pad to ground adversely affects the performance of the part.
ADD8708
Rev. 0 | Page 12 of 16
OPERATING TEMPERATURE RANGE
The junction temperature is as follows:
T
J
= T
AMB
+
JA
× P
DIS
where:
T
AMB
= ambient temperature.
JA
= junction-to-ambient thermal resistance, in °C/watt.
P
DIS
= power dissipated in the device, in watts.
For the ADD8708, P
DIS
can be calculated by this equation:
P
DIS
= V
DD
× I
DQ
+ (I
OUT X(+)
× (V
DD
- V
OUT X
)) +
(-I
OUT X(-)
× V
OUT X
) + (V
DD
V
REG OUT
) × I
LOAD
where:
V
DD
× I
DQ
= nominal system power requirements.
I
OUT X(+)
× (V
DD
- V
OUT X
)= positive-current amplifier load
power dissipation (current comes from V
DD
).
-I
OUT X(-)
× V
OUT X
= negative-current amplifier load power
dissipation (current goes to GND).
(V
DD
V
REG OUT
) × I
LOAD
= regulator load power dissipation.
In this example, T
AMB
= 95°C. To calculate P
DIS
, assume the
values in Table 6.
Table 6.
V
OUT X
(V)
I
OUT X
(mA)
P (W)
V
OUT
18 14.400
4.3
0.00688
V
OUT
17 11.405
5.2
0.0239
V
OUT
16 10.627
-4.4
0.0468
V
OUT
15 10.397
7.3
0.0409
V
OUT
14 10.195
7.6
0.0441
V
OUT
13 10.080
-3.9
0.0393
V
OUT
12 9.821
8.3
0.0513
V
OUT
11 9.130
7.9
0.0543
V
OUT
10 8.611
-4.5
0.0389
V
OUT
9 6.480
-4.2
0.0272
V
OUT
8 6.077
5.6
0.0556
V
OUT
7 5.098
-3.3
0.0168
V
OUT
6 4.810
-6.9
0.0332
V
OUT
5 4.694
5.7
0.0644
V
OUT
4 4.435
3.5
0.0405
V
OUT
3 4.205
9.6
0.113
V
OUT
2 3.398
-9.5
0.0323
V
OUT
1 0.202
-7.2
0.00145
(I
OUT X(+)
× (V
DD
- V
OUT X
)) + (
-I
OUT X(
-)
× V
OUT X
)
0.731
V
DD
× I
DQ
= 16 V × 15 mA = 0.240 W
(V
DD
V
REG OUT
) × I
LOAD
= (16 V 14.4 V) × 5 mA = 0.008 W
P
DIS
= 0.240 W + 0.731 W + 0.008 W =0.979 W
Example 1
Exposed pad soldered down with via
JA
= 28.3°C/W:
T
J
= 95°C + (28.3°C/W) × (0.979 W) = 122.7°C
where 150°C is the maximum junction temperature that is
guaranteed before the part breaks down. The maximum process
limit is 125°C. Because T
J
is < 150°C and < 125°C, this example
demonstrates a condition where the part should perform within
process limits.
Example 2
Exposed pad not soldered down
JA
= 47.7°C/W:
T
J
= 95°C + (47.7°C/W) × (0.979 W) = 141.7°C
In this example, T
J
is < 150°C but > 125°C. Although the part
should not exhibit any damage in this situation, the process
limits have been exceeded. The part may no longer operate
as intended.
These examples show that soldering down the exposed pad is
important for proper heat dissipation. Under the same power-
up and loading conditions, the unsoldered part has a higher
temperature than the soldered part. Therefore, it is strongly
advised that the exposed pad be soldered to V
DD
to maintain
part integrity.
ADD8708
Rev. 0 | Page 13 of 16
04614-024
1.60mm
1.90mm
5.93mm
5.78mm
7.31mm
5.40mm
0.69mm
0.075mm
0.28mm
0.075mm
0.5mm
0.33mm DIAMETER
THERMAL VIA
HEAT SINK
SOLDER PASTE AREA
1.60mm
Figure 24. 48-Pin LFCSP (CP-48) Land Pattern--Dimensions Shown in Millimeters
Notes:
1.
Areas in black represent the board metallization.
2.
Areas in white represent the solder mask and vias.
3.
Hatched area is for the heat sink solder paste.
4.
The thermal pad is electrically active. The solder mask opening should be 0.150 mm larger than the pad size, resulting in 0.075 mm
of clearance between the copper pad and solder mask.
ADD8708
Rev. 0 | Page 14 of 16
TYPICAL APPLICATIONS CIRCUIT
04614-025
GND
GND
V
DD
16V
GAMMA
BUFFERS
1.2V
+
V
OUT
18
V
OUT
17
V
OUT
16
V
OUT
15
V
OUT
14
V
OUT
13
V
OUT
12
V
OUT
11
V
OUT
10
V
OUT
9
V
OUT
8
V
OUT
7
V
OUT
6
V
OUT
5
V
OUT
4
V
OUT
3
V
OUT
2
V
OUT
1
0
3.12k
810
240
210
120
270
720
540
2.22k
420
1.02k
300
120
270
240
840
3.33k
210
14.400V
11.405V
10.627V
10.397V
10.195V
10.080V
9.821V
9.130V
8.611V
6.480V
6.077V
5.098V
4.810V
4.694V
4.435V
4.205V
3.398V
0.202V
V
IN
18
V
IN
17
V
IN
16
V
IN
15
V
IN
14
V
IN
13
V
IN
12
V
IN
11
V
IN
10
V
IN
9
V
IN
8
V
IN
7
V
IN
6
V
IN
5
V
IN
4
V
IN
3
V
IN
2
V
IN
1
TP18 = 500
TP17 = 396
TP16 = 369
TP15 = 361
TP14 = 354
TP13 = 350
TP12 = 341
TP11 = 317
TP10 = 299
TP9 = 225
TP8 = 211
TP7 = 177
TP6 = 167
TP5 = 163
TP4 = 154
TP3 = 146
TP2 = 118
TP1 = 7
FB
NORMALLY
OPEN
NORMALLY
OPEN
55k
700
5k
VOLTAGE
REGULATOR
V
REG OUT
0.1
µ
F
GAMMA 17
GAMMA 16
GAMMA 18
GAMMA 15
GAMMA 14
GAMMA 13
GAMMA 12
GAMMA 11
GAMMA 10
GAMMA 9
GAMMA 8
GAMMA 7
GAMMA 6
GAMMA 5
GAMMA 4
GAMMA 3
GAMMA 2
GAMMA 1
GAMMA 17
GAMMA 16
GAMMA 18
GAMMA 15
GAMMA 14
GAMMA 13
GAMMA 12
GAMMA 11
GAMMA 10
GAMMA 9
GAMMA 8
GAMMA 7
GAMMA 6
GAMMA 5
GAMMA 4
GAMMA 3
GAMMA 2
GAMMA 1
GAMMA 17
GAMMA 16
GAMMA 18
GAMMA 15
GAMMA 14
GAMMA 13
GAMMA 12
GAMMA 11
GAMMA 10
GAMMA 9
GAMMA 8
GAMMA 7
GAMMA 6
GAMMA 5
GAMMA 4
GAMMA 3
GAMMA 2
GAMMA 1
0.1
µ
F
700
700
700
700
700
700
700
700
700
700
700
700
700
700
700
700
700
700
ESD PROTECTION
RESISTORS
ESD PROTECTION
RESISTOR
Figure 25. Typical Application Circuit
ADD8708
Rev. 0 | Page 15 of 16
TAP POINT AND REGULATOR VOLTAGE REQUEST FORM
REGULATOR SECTION--V
REG OUT
To ensure correct regulator operation V
DD
must exceed V
REG
by 600 mV minimum--that is, a V
REG
= 14.4 V requires a minimum
V
DD
= 15.0 V.
Parameter
Value (6.9 V 15.4 V)
V
REG OUT
TAP POINT SECTION
Gamma output voltages are calculated using the following formula:
500
OUT
REG
OUT
V
TP
V
×
=
A Microsoft® Excel spreadsheet is available which automatically calculates the best tap point based on V
REG OUT
and the desired output
voltages for each gamma output.
Output
Tap Point
V
OUT
18
V
OUT
17
V
OUT
16
V
OUT
15
V
OUT
14
V
OUT
13
V
OUT
12
V
OUT
11
V
OUT
10
V
OUT
9
V
OUT
8
V
OUT
7
V
OUT
6
V
OUT
5
V
OUT
4
V
OUT
3
V
OUT
2
V
OUT
1
CUSTOMER INFORMATION
Name: ____________________________________________
Company: ____________________________________________
Address: ____________________________________________
____________________________________________
Date: ____________________________________________
Please return this form to your local sales office.
ADD8708
Rev. 0 | Page 16 of 16
OUTLINE DIMENSIONS
PIN 1
INDICATOR
TOP
VIEW
6.75
BSC SQ
7.00
BSC SQ
1
48
12
13
37
36
24
25
5.25
5.10 SQ
4.95
0.50
0.40
0.30
0.30
0.23
0.18
0.50 BSC
12° MAX
0.20 REF
0.80 MAX
0.65 TYP
1.00
0.85
0.80
5.50
REF
0.05 MAX
0.02 NOM
0.60 MAX
0.60 MAX
PIN 1
INDICATOR
COPLANARITY
0.08
SEATING
PLANE
0.25 MIN
EXPOSED
PAD
(BOTTOM VIEW)
COMPLIANT TO JEDEC STANDARDS MO-220-VKKD-2
Figure 26. 48-Lead Lead Frame Chip Scale Package [LFCSP]
7 mm × 7 mm Body
(CP-48)
Dimensions shown in millimeters
TOP VIEW
(PINS DOWN)
1
12
13
25
24
36
37
48
0.27
0.22
0.17
0.50
BSC
7.00
BSC SQ
SEATING
PLANE
1.60
MAX
0.75
0.60
0.45
VIEW A
9.00
BSC SQ
PIN 1
0.20
0.09
1.45
1.40
1.35
0.08 MAX
COPLANARITY
VIEW A
ROTATED 90° CCW
SEATING
PLANE
10°
6°
2°
7°
3.5°
0°
0.15
0.05
COMPLIANT TO JEDEC STANDARDS MS-026BBC
Figure 27. 48-Lead Low Profile Quad Flat Package [LQFP]
(ST-48)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range
Package Description
Package Option
ADD8708WCPZ-REEL7
2
40°C to +105°C
48-Lead Lead Frame Chip Scale Package
CP-48
ADD8708WSTZ-REEL
2
40°C to +105°C
48-Lead Low Profile Quad Flat Package
ST-48
1
Available in reels only.
2
Z = Pb-free part.
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04614010/04(0)
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